Christian Walter has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45867 )
Change subject: security/intel/txt: Style fixes ......................................................................
security/intel/txt: Style fixes
Fix two style issues. First one is to align the #define in txt_registers.h, the second one prints the chipset as hex to make it more readable.
Change-Id: Ifafbe0a1161e9fe6e790692002375f45d813b723 Signed-off-by: Christian Walter christian.walter@9elements.com --- M src/security/intel/txt/logging.c M src/security/intel/txt/txt_register.h 2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/45867/1
diff --git a/src/security/intel/txt/logging.c b/src/security/intel/txt/logging.c index cf14b55..f329cf9 100644 --- a/src/security/intel/txt/logging.c +++ b/src/security/intel/txt/logging.c @@ -141,7 +141,7 @@ printk(BIOS_INFO, " Header: v%u.%u\n", acm_header->header_version[0], acm_header->header_version[1]);
- printk(BIOS_INFO, " Chipset: %u\n", acm_header->chipset_id); + printk(BIOS_INFO, " Chipset: %x\n", acm_header->chipset_id); printk(BIOS_INFO, " Size: %zu\n", acm_size);
switch (acm_header->flags) { diff --git a/src/security/intel/txt/txt_register.h b/src/security/intel/txt/txt_register.h index c7f1575..bf087de 100644 --- a/src/security/intel/txt/txt_register.h +++ b/src/security/intel/txt/txt_register.h @@ -23,7 +23,7 @@ */ #define TXT_ESTS_WAKE_ERROR_STS (1 << 6)
-#define TXT_ERROR (TXT_BASE + 0x30) +#define TXT_ERROR (TXT_BASE + 0x30) #define ACMERROR_TXT_VALID (1ul << 31) #define ACMERROR_TXT_EXTERNAL (1ul << 30)
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45867 )
Change subject: security/intel/txt: Style fixes ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45867/1/src/security/intel/txt/txt_... File src/security/intel/txt/txt_register.h:
https://review.coreboot.org/c/coreboot/+/45867/1/src/security/intel/txt/txt_... PS1, Line 26: TXT_ERROR The previous align was correct. Only bitfields within the register have two spaces. See TXT_SPAD for reference.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45867 )
Change subject: security/intel/txt: Style fixes ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45867/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45867/1//COMMIT_MSG@7 PS1, Line 7: security/intel/txt: Style fixes Please make it a statement by using a verb (in imperative mood):
Fix style
Improve style
https://review.coreboot.org/c/coreboot/+/45867/1//COMMIT_MSG@11 PS1, Line 11: more readable. Please make it two commits.
Hello Philipp Deppenwiese, build bot (Jenkins), Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45867
to look at the new patch set (#3).
Change subject: security/intel/txt: Print chipset as hex value ......................................................................
security/intel/txt: Print chipset as hex value
Print chipset as hex value in order to make it more readable.
Change-Id: Ifafbe0a1161e9fe6e790692002375f45d813b723 Signed-off-by: Christian Walter christian.walter@9elements.com --- M src/security/intel/txt/logging.c M src/security/intel/txt/txt_register.h 2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/45867/3
Hello Philipp Deppenwiese, build bot (Jenkins), Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45867
to look at the new patch set (#4).
Change subject: security/intel/txt: Print chipset as hex value ......................................................................
security/intel/txt: Print chipset as hex value
Print chipset as hex value in order to make it more readable.
Change-Id: Ifafbe0a1161e9fe6e790692002375f45d813b723 Signed-off-by: Christian Walter christian.walter@9elements.com --- M src/security/intel/txt/logging.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/45867/4
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45867 )
Change subject: security/intel/txt: Print chipset as hex value ......................................................................
Patch Set 4: Code-Review+2
(3 comments)
https://review.coreboot.org/c/coreboot/+/45867/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45867/1//COMMIT_MSG@7 PS1, Line 7: security/intel/txt: Style fixes
Please make it a statement by using a verb (in imperative mood): […]
Done
https://review.coreboot.org/c/coreboot/+/45867/1//COMMIT_MSG@11 PS1, Line 11: more readable.
Please make it two commits.
Ack
https://review.coreboot.org/c/coreboot/+/45867/1/src/security/intel/txt/txt_... File src/security/intel/txt/txt_register.h:
https://review.coreboot.org/c/coreboot/+/45867/1/src/security/intel/txt/txt_... PS1, Line 26: TXT_ERROR
The previous align was correct. Only bitfields within the register have two spaces. […]
Ack
Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45867 )
Change subject: security/intel/txt: Print chipset as hex value ......................................................................
Patch Set 4:
Thanks Angel 😎
Philipp Deppenwiese has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45867 )
Change subject: security/intel/txt: Print chipset as hex value ......................................................................
security/intel/txt: Print chipset as hex value
Print chipset as hex value in order to make it more readable.
Change-Id: Ifafbe0a1161e9fe6e790692002375f45d813b723 Signed-off-by: Christian Walter christian.walter@9elements.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45867 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/security/intel/txt/logging.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/security/intel/txt/logging.c b/src/security/intel/txt/logging.c index cf14b55..f329cf9 100644 --- a/src/security/intel/txt/logging.c +++ b/src/security/intel/txt/logging.c @@ -141,7 +141,7 @@ printk(BIOS_INFO, " Header: v%u.%u\n", acm_header->header_version[0], acm_header->header_version[1]);
- printk(BIOS_INFO, " Chipset: %u\n", acm_header->chipset_id); + printk(BIOS_INFO, " Chipset: %x\n", acm_header->chipset_id); printk(BIOS_INFO, " Size: %zu\n", acm_size);
switch (acm_header->flags) {
-
Angel Pons (Code Review) -
Christian Walter (Code Review)
-
Patrick Rudolph (Code Review)
-
Paul Menzel (Code Review)
-
Philipp Deppenwiese (Code Review)