Christian Walter has uploaded this change for review.
security/intel/txt: Style fixes
Fix two style issues. First one is to align the #define in
txt_registers.h, the second one prints the chipset as hex to make it
more readable.
Change-Id: Ifafbe0a1161e9fe6e790692002375f45d813b723
Signed-off-by: Christian Walter <christian.walter@9elements.com>
---
M src/security/intel/txt/logging.c
M src/security/intel/txt/txt_register.h
2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/45867/1
diff --git a/src/security/intel/txt/logging.c b/src/security/intel/txt/logging.c
index cf14b55..f329cf9 100644
--- a/src/security/intel/txt/logging.c
+++ b/src/security/intel/txt/logging.c
@@ -141,7 +141,7 @@
printk(BIOS_INFO, " Header: v%u.%u\n", acm_header->header_version[0],
acm_header->header_version[1]);
- printk(BIOS_INFO, " Chipset: %u\n", acm_header->chipset_id);
+ printk(BIOS_INFO, " Chipset: %x\n", acm_header->chipset_id);
printk(BIOS_INFO, " Size: %zu\n", acm_size);
switch (acm_header->flags) {
diff --git a/src/security/intel/txt/txt_register.h b/src/security/intel/txt/txt_register.h
index c7f1575..bf087de 100644
--- a/src/security/intel/txt/txt_register.h
+++ b/src/security/intel/txt/txt_register.h
@@ -23,7 +23,7 @@
*/
#define TXT_ESTS_WAKE_ERROR_STS (1 << 6)
-#define TXT_ERROR (TXT_BASE + 0x30)
+#define TXT_ERROR (TXT_BASE + 0x30)
#define ACMERROR_TXT_VALID (1ul << 31)
#define ACMERROR_TXT_EXTERNAL (1ul << 30)
To view, visit change 45867. To unsubscribe, or for help writing mail filters, visit settings.