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Change subject: mb/google/guybrush: Add temporary _AIE table ......................................................................
mb/google/guybrush: Add temporary _AIE table
On Cezanne, S0i3 wakes are all handled by the GPIO controller. When a wake is asserted, the GPIO controller is the only subsystem that registers the wake. There are no GEVENTs/GPEs raised. This means that we can't use the GPE number in the _PRW package for two reasons: 1) The GPE will never get asserted, so the device will not be credited as being the wake source. 2) The GPIO's wake_status bit will never get cleared. This means that on a second S0i3 sleep, the system will be instantly woken up.
In order to solve these problems, we need to tell the OS which GPIOs can be used to wake up the system. By providing the _AEI table we give the OS the ability to * Enable/disable if a GPIO is a wake source. This doesn't technically work yet because the GPIO kernel driver had not yet implemented irq_set_wake. * Associate a GPIO wake with a device so it can correctly increment the wake_source. * Clear the wake_status bit from the GPIO.
This CL is currently a workaround. Coreboot doesn't yet have any infrastructure for generating the _AEI table. The ACPI chip drivers (drivers/i2c/generic, drivers/uart/acpi, etc) don't have the ability to specify the _AEI index as a wake source either. This will all be implemented in later CLs.
This CL only handles EC_SOC_WAKE_ODL. It allows testing S0i3 resume using the internal keyboard, and the lid switch. Other devices will need to be added as they are tested.
BUG=b:185621145 TEST=Multiple S0i3 cycles using internal keyboard
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I8508e5fd8f23a6a8364a8dbf919568d472cc9409 --- A src/mainboard/google/guybrush/aei.asl M src/mainboard/google/guybrush/dsdt.asl M src/mainboard/google/guybrush/variants/baseboard/include/baseboard/ec.h 3 files changed, 15 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/52766/2