Change in coreboot[master]: mb/intel/shadowmountain: Disable GSPI1 interface connected to FPS

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52186 )

Change subject: mb/intel/shadowmountain: Disable GSPI1 interface connected to FPS
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mb/intel/shadowmountain: Disable GSPI1 interface connected to FPS

The patch disables GSPI1 interface connected to fingerprint scanner since
no plans to enable FPS on Shadowmountain.

TEST=Verified on Shadowmountain

Signed-off-by: Sridhar Siricilla 
Change-Id: Ic693a8c9699d7d1cceef9ca26305cc34498022d6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52186
Tested-by: build bot (Jenkins) 
Reviewed-by: Rizwan Qureshi 
Reviewed-by: Maulik V Vaghela 
---
M src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
M src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c
2 files changed, 2 insertions(+), 10 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Rizwan Qureshi: Looks good to me, approved
  Maulik V Vaghela: Looks good to me, approved

diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
index 5b3dbbf..ac7c31d 100644
--- a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
@@ -91,19 +91,17 @@

register "SerialIoGSpiMode" = "{
    	[PchSerialIoIndexGSPI0] = PchSerialIoPci,
-		[PchSerialIoIndexGSPI1] = PchSerialIoPci,
+		[PchSerialIoIndexGSPI1] = PchSerialIoDisabled,
    	[PchSerialIoIndexGSPI2] = PchSerialIoDisabled,
    	[PchSerialIoIndexGSPI3] = PchSerialIoDisabled,
    }"

register "SerialIoGSpiCsMode" = "{
    	[PchSerialIoIndexGSPI0] = 1,
-		[PchSerialIoIndexGSPI1] = 1,
    }"

register "SerialIoGSpiCsState" = "{
    	[PchSerialIoIndexGSPI0] = 1,
-		[PchSerialIoIndexGSPI1] = 1,
    }"

register "SerialIoUartMode" = "{
diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c b/src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c
index 090715e..8d7778c 100644
--- a/src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c
+++ b/src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c
@@ -38,7 +38,7 @@
    /* A18 : HDMI_HPD */
    PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
    /* A21 : EN_FP_PWR */
-	PAD_CFG_GPO(GPP_A21, 1, DEEP),
+	PAD_CFG_GPO(GPP_A21, 0, DEEP),
    /* A22 : EN_HDMI_PWR */
    PAD_CFG_GPO(GPP_A22, 1, DEEP),
    /* A23 : EN_SPKR_PA */
@@ -204,12 +204,6 @@
    PAD_CFG_GPI_INT(GPP_F9, NONE, PLTRST, EDGE_BOTH),
    /* F10 : EN_PP3300_TOUCHSCREEN */
    PAD_CFG_GPO(GPP_F10, 0, DEEP),
-	/* F11 : PCH_GSPI1_FPMCU_CLK */
-	PAD_CFG_NF(GPP_F11, NONE, DEEP, NF4),
-	/* F12 : PCH_GSPI1_FPMCU_MISO */
-	PAD_CFG_NF(GPP_F12, NONE, DEEP, NF4),
-	/* F13 : PCH_GSPI1_FPMCU_MISO */
-	PAD_CFG_NF(GPP_F13, NONE, DEEP, NF4),
    /* F14 : WLAN_RST_ODL */
    PAD_CFG_GPO(GPP_F14, 1, DEEP),
    /* F15 : RCAM_RST_L */