Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43155 )
Change subject: sb/intel/i82801{gx,ix,jx}/acpi: Align cosmetics ......................................................................
sb/intel/i82801{gx,ix,jx}/acpi: Align cosmetics
This reduces the differences between ACPI for these three southbridges.
Change-Id: If49bad776ebc98cab439f8ea6942471520c476a3 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/i82801gx/acpi/audio.asl M src/southbridge/intel/i82801gx/acpi/lpc.asl M src/southbridge/intel/i82801gx/acpi/usb.asl M src/southbridge/intel/i82801ix/acpi/audio.asl M src/southbridge/intel/i82801ix/acpi/globalnvs.asl M src/southbridge/intel/i82801ix/acpi/lpc.asl M src/southbridge/intel/i82801ix/acpi/usb.asl M src/southbridge/intel/i82801jx/acpi/audio.asl M src/southbridge/intel/i82801jx/acpi/globalnvs.asl M src/southbridge/intel/i82801jx/acpi/lpc.asl M src/southbridge/intel/i82801jx/acpi/usb.asl 11 files changed, 12 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/43155/1
diff --git a/src/southbridge/intel/i82801gx/acpi/audio.asl b/src/southbridge/intel/i82801gx/acpi/audio.asl index 19cfcab..b9c256c 100644 --- a/src/southbridge/intel/i82801gx/acpi/audio.asl +++ b/src/southbridge/intel/i82801gx/acpi/audio.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-/* Intel i82801G HDA */ +/* Intel ICH HDA */
// Intel High Definition Audio (Azalia) 0:1b.0
diff --git a/src/southbridge/intel/i82801gx/acpi/lpc.asl b/src/southbridge/intel/i82801gx/acpi/lpc.asl index 0b0e987..137f2ba 100644 --- a/src/southbridge/intel/i82801gx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801gx/acpi/lpc.asl @@ -156,8 +156,8 @@ IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI IO (Decode16, 0x800, 0x800, 0x1, 0x10) // ACPI I/O trap - IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH7-M ACPI - IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH7-M GPIO + IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH ACPI + IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH GPIO }) }
diff --git a/src/southbridge/intel/i82801gx/acpi/usb.asl b/src/southbridge/intel/i82801gx/acpi/usb.asl index 6c095f2..16db175 100644 --- a/src/southbridge/intel/i82801gx/acpi/usb.asl +++ b/src/southbridge/intel/i82801gx/acpi/usb.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-/* Intel i82801G USB support */ +/* Intel ICH USB support */
// USB Controller 0:1d.0
diff --git a/src/southbridge/intel/i82801ix/acpi/audio.asl b/src/southbridge/intel/i82801ix/acpi/audio.asl index 7dc2564..b9c256c 100644 --- a/src/southbridge/intel/i82801ix/acpi/audio.asl +++ b/src/southbridge/intel/i82801ix/acpi/audio.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-/* Intel i82801I HDA */ +/* Intel ICH HDA */
// Intel High Definition Audio (Azalia) 0:1b.0
diff --git a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl index 3b6115f..0a0f255 100644 --- a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl +++ b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl @@ -10,7 +10,6 @@ * we have to fix it up in coreboot's ACPI creation phase. */
- External(NVSA) OperationRegion (GNVS, SystemMemory, NVSA, 0x100) Field (GNVS, ByteAcc, NoLock, Preserve) diff --git a/src/southbridge/intel/i82801ix/acpi/lpc.asl b/src/southbridge/intel/i82801ix/acpi/lpc.asl index 6fc2a84..137f2ba 100644 --- a/src/southbridge/intel/i82801ix/acpi/lpc.asl +++ b/src/southbridge/intel/i82801ix/acpi/lpc.asl @@ -156,8 +156,8 @@ IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI IO (Decode16, 0x800, 0x800, 0x1, 0x10) // ACPI I/O trap - IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH9 ACPI - IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH9 GPIO + IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH ACPI + IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH GPIO }) }
diff --git a/src/southbridge/intel/i82801ix/acpi/usb.asl b/src/southbridge/intel/i82801ix/acpi/usb.asl index 1f44b4a1..55929af 100644 --- a/src/southbridge/intel/i82801ix/acpi/usb.asl +++ b/src/southbridge/intel/i82801ix/acpi/usb.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-/* Intel i82801I USB support */ +/* Intel ICH USB support */
// USB Controller 0:1d.0
diff --git a/src/southbridge/intel/i82801jx/acpi/audio.asl b/src/southbridge/intel/i82801jx/acpi/audio.asl index fca6474..b9c256c 100644 --- a/src/southbridge/intel/i82801jx/acpi/audio.asl +++ b/src/southbridge/intel/i82801jx/acpi/audio.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-/* Intel i82801L HDA */ +/* Intel ICH HDA */
// Intel High Definition Audio (Azalia) 0:1b.0
diff --git a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl index 3b6115f..0a0f255 100644 --- a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl +++ b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl @@ -10,7 +10,6 @@ * we have to fix it up in coreboot's ACPI creation phase. */
- External(NVSA) OperationRegion (GNVS, SystemMemory, NVSA, 0x100) Field (GNVS, ByteAcc, NoLock, Preserve) diff --git a/src/southbridge/intel/i82801jx/acpi/lpc.asl b/src/southbridge/intel/i82801jx/acpi/lpc.asl index 20d9aaf..137f2ba 100644 --- a/src/southbridge/intel/i82801jx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801jx/acpi/lpc.asl @@ -156,8 +156,8 @@ IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI IO (Decode16, 0x800, 0x800, 0x1, 0x10) // ACPI I/O trap - IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH10 ACPI - IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH10 GPIO + IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH ACPI + IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH GPIO }) }
diff --git a/src/southbridge/intel/i82801jx/acpi/usb.asl b/src/southbridge/intel/i82801jx/acpi/usb.asl index 9950f72..55929af 100644 --- a/src/southbridge/intel/i82801jx/acpi/usb.asl +++ b/src/southbridge/intel/i82801jx/acpi/usb.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-/* Intel i82801J USB support */ +/* Intel ICH USB support */
// USB Controller 0:1d.0
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43155 )
Change subject: sb/intel/i82801{gx,ix,jx}/acpi: Align cosmetics ......................................................................
Patch Set 1: Code-Review+1
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43155 )
Change subject: sb/intel/i82801{gx,ix,jx}/acpi: Align cosmetics ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43155/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43155/1//COMMIT_MSG@7 PS1, Line 7: sb/intel/i82801{gx,ix,jx}/acpi: Align cosmetics
Unify alignment
Unify cosmetics
Oh, *align* is meant as *unify* here.
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43155 )
Change subject: sb/intel/i82801{gx,ix,jx}/acpi: Align cosmetics ......................................................................
Patch Set 1: Code-Review+2
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43155 )
Change subject: sb/intel/i82801{gx,ix,jx}/acpi: Align cosmetics ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43155 )
Change subject: sb/intel/i82801{gx,ix,jx}/acpi: Align cosmetics ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43155/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43155/1//COMMIT_MSG@7 PS1, Line 7: sb/intel/i82801{gx,ix,jx}/acpi: Align cosmetics
Unify alignment […]
I use "align" whenever I change things so that the diffstat is smaller. I would use "unify" whenever I actually merge things together, like CB:39737 or https://review.coreboot.org/q/topic:%22unify_hp_laptops"
When I extract a common piece of code, I use "factor out"
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43155 )
Change subject: sb/intel/i82801{gx,ix,jx}/acpi: Align cosmetics ......................................................................
Patch Set 2: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43155 )
Change subject: sb/intel/i82801{gx,ix,jx}/acpi: Align cosmetics ......................................................................
sb/intel/i82801{gx,ix,jx}/acpi: Align cosmetics
This reduces the differences between ACPI for these three southbridges.
Change-Id: If49bad776ebc98cab439f8ea6942471520c476a3 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/43155 Reviewed-by: Arthur Heymans arthur@aheymans.xyz Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: HAOUAS Elyes ehaouas@noos.fr Reviewed-by: Frans Hendriks fhendriks@eltan.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/southbridge/intel/i82801gx/acpi/audio.asl M src/southbridge/intel/i82801gx/acpi/lpc.asl M src/southbridge/intel/i82801gx/acpi/usb.asl M src/southbridge/intel/i82801ix/acpi/audio.asl M src/southbridge/intel/i82801ix/acpi/globalnvs.asl M src/southbridge/intel/i82801ix/acpi/lpc.asl M src/southbridge/intel/i82801ix/acpi/usb.asl M src/southbridge/intel/i82801jx/acpi/audio.asl M src/southbridge/intel/i82801jx/acpi/globalnvs.asl M src/southbridge/intel/i82801jx/acpi/lpc.asl M src/southbridge/intel/i82801jx/acpi/usb.asl 11 files changed, 12 insertions(+), 14 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve HAOUAS Elyes: Looks good to me, approved Arthur Heymans: Looks good to me, approved Frans Hendriks: Looks good to me, approved
diff --git a/src/southbridge/intel/i82801gx/acpi/audio.asl b/src/southbridge/intel/i82801gx/acpi/audio.asl index 19cfcab..b9c256c 100644 --- a/src/southbridge/intel/i82801gx/acpi/audio.asl +++ b/src/southbridge/intel/i82801gx/acpi/audio.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-/* Intel i82801G HDA */ +/* Intel ICH HDA */
// Intel High Definition Audio (Azalia) 0:1b.0
diff --git a/src/southbridge/intel/i82801gx/acpi/lpc.asl b/src/southbridge/intel/i82801gx/acpi/lpc.asl index 0b0e987..137f2ba 100644 --- a/src/southbridge/intel/i82801gx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801gx/acpi/lpc.asl @@ -156,8 +156,8 @@ IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI IO (Decode16, 0x800, 0x800, 0x1, 0x10) // ACPI I/O trap - IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH7-M ACPI - IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH7-M GPIO + IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH ACPI + IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH GPIO }) }
diff --git a/src/southbridge/intel/i82801gx/acpi/usb.asl b/src/southbridge/intel/i82801gx/acpi/usb.asl index 6c095f2..16db175 100644 --- a/src/southbridge/intel/i82801gx/acpi/usb.asl +++ b/src/southbridge/intel/i82801gx/acpi/usb.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-/* Intel i82801G USB support */ +/* Intel ICH USB support */
// USB Controller 0:1d.0
diff --git a/src/southbridge/intel/i82801ix/acpi/audio.asl b/src/southbridge/intel/i82801ix/acpi/audio.asl index 7dc2564..b9c256c 100644 --- a/src/southbridge/intel/i82801ix/acpi/audio.asl +++ b/src/southbridge/intel/i82801ix/acpi/audio.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-/* Intel i82801I HDA */ +/* Intel ICH HDA */
// Intel High Definition Audio (Azalia) 0:1b.0
diff --git a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl index 3b6115f..0a0f255 100644 --- a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl +++ b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl @@ -10,7 +10,6 @@ * we have to fix it up in coreboot's ACPI creation phase. */
- External(NVSA) OperationRegion (GNVS, SystemMemory, NVSA, 0x100) Field (GNVS, ByteAcc, NoLock, Preserve) diff --git a/src/southbridge/intel/i82801ix/acpi/lpc.asl b/src/southbridge/intel/i82801ix/acpi/lpc.asl index 6fc2a84..137f2ba 100644 --- a/src/southbridge/intel/i82801ix/acpi/lpc.asl +++ b/src/southbridge/intel/i82801ix/acpi/lpc.asl @@ -156,8 +156,8 @@ IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI IO (Decode16, 0x800, 0x800, 0x1, 0x10) // ACPI I/O trap - IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH9 ACPI - IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH9 GPIO + IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH ACPI + IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH GPIO }) }
diff --git a/src/southbridge/intel/i82801ix/acpi/usb.asl b/src/southbridge/intel/i82801ix/acpi/usb.asl index 1f44b4a1..55929af 100644 --- a/src/southbridge/intel/i82801ix/acpi/usb.asl +++ b/src/southbridge/intel/i82801ix/acpi/usb.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-/* Intel i82801I USB support */ +/* Intel ICH USB support */
// USB Controller 0:1d.0
diff --git a/src/southbridge/intel/i82801jx/acpi/audio.asl b/src/southbridge/intel/i82801jx/acpi/audio.asl index fca6474..b9c256c 100644 --- a/src/southbridge/intel/i82801jx/acpi/audio.asl +++ b/src/southbridge/intel/i82801jx/acpi/audio.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-/* Intel i82801L HDA */ +/* Intel ICH HDA */
// Intel High Definition Audio (Azalia) 0:1b.0
diff --git a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl index 3b6115f..0a0f255 100644 --- a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl +++ b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl @@ -10,7 +10,6 @@ * we have to fix it up in coreboot's ACPI creation phase. */
- External(NVSA) OperationRegion (GNVS, SystemMemory, NVSA, 0x100) Field (GNVS, ByteAcc, NoLock, Preserve) diff --git a/src/southbridge/intel/i82801jx/acpi/lpc.asl b/src/southbridge/intel/i82801jx/acpi/lpc.asl index 20d9aaf..137f2ba 100644 --- a/src/southbridge/intel/i82801jx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801jx/acpi/lpc.asl @@ -156,8 +156,8 @@ IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI IO (Decode16, 0x800, 0x800, 0x1, 0x10) // ACPI I/O trap - IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH10 ACPI - IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH10 GPIO + IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH ACPI + IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH GPIO }) }
diff --git a/src/southbridge/intel/i82801jx/acpi/usb.asl b/src/southbridge/intel/i82801jx/acpi/usb.asl index 9950f72..55929af 100644 --- a/src/southbridge/intel/i82801jx/acpi/usb.asl +++ b/src/southbridge/intel/i82801jx/acpi/usb.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-/* Intel i82801J USB support */ +/* Intel ICH USB support */
// USB Controller 0:1d.0
-
Angel Pons (Code Review) -
Arthur Heymans (Code Review)
-
Frans Hendriks (Code Review)
-
HAOUAS Elyes (Code Review)
-
Paul Menzel (Code Review)