Change in coreboot[master]: util/spd_tools: Add LP5 support for ADL

[Reka Norman (Code Review)]

Attention is currently required from: Tim Wawrzynczak, Sridhar Siricilla, Nick Vaccaro, Balaji Manigandan, Krishna P Bhat D.
Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58679 )

Change subject: util/spd_tools: Add LP5 support for ADL
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Patch Set 11:

(1 comment)

File util/spd_tools/src/spd_gen/lp5.go:

https://review.coreboot.org/c/coreboot/+/58679/comment/a44eebfb_e0702002 
PS5, Line 18: 	DensityPerDieGb    int
> I'm not familiar with this. I'll look into it.

I assume you're talking about MEM_CH_SEL? E.g. https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/src...

My understanding of this still isn't great, so I could be completely wrong. But I think these are two different uses of the term channel:

1. What we're talking about here is the channels per die. This is a detail of the memory part's internal structure, i.e. which of the part's x8/x16 IO channels are connected to which dies internally.

2. MEM_CH_SEL is talking about the SoC's memory channels. E.g. ADL-P has 2 x64 channels A and B, and I think setting MEM_CH_SEL means that only one of these channels is used.