Change in coreboot[master]: soc/intel/cannonlake: Configure GPIOs again after FSP-S is done - coreboot-gerrit

2 Feb 2021


      Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31250 )
Change subject: soc/intel/cannonlake: Configure GPIOs again after FSP-S is done
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Patch Set 5:
(1 comment)
Patchset:
PS5:
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I had used this diff: […]
I have some insane idea \o/ My first thought was, why not set PadCfgLock, so FSP can't write the pad config anymore, but FSP unlocks it. However, unlocking it generates a "synchronous SMI#". Couldn't we add a SMI handler in coreboot to just set the lock again? :D
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I7787aa8f185f633627bcedc7f23504bf4a5250b4
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