Change in coreboot[master]: common/block/pcie/rtd3:[WIP] use the correct confing name for clkreq ...

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Rizwan Qureshi, Patrick Rudolph.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52194 )

Change subject: common/block/pcie/rtd3:[WIP] use the correct confing name for clkreq pin count
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Patch Set 1:

(1 comment)

File src/soc/intel/common/block/pcie/rtd3/rtd3.c:

https://review.coreboot.org/c/coreboot/+/52194/comment/a815d095_7e490947 
PS1, Line 203: CONFIG_MAX_PCIE_CLOCK_REQ
Couple of things:
1) I think this is referring to what alderlake/Kconfig calls `MAX_PCIE_CLOCK_SRC` (CLKSRC, not CLKREQ#)
2) Because this common code assumes the existence of MAX_PCIE_CLOCKS, the Kconfig `MAX_PCIE_CLOCK_SRC` needs to be renamed to `MAX_PCIE_CLOCKS` in order to use this module in alderlake code.