Change in coreboot[master]: nb/intel/haswell/gma.c: Refactor CdClk init code - coreboot-gerrit

1 Aug 2021


      Attention is currently required from: Angel Pons, Patrick Rudolph.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50136 )
Change subject: nb/intel/haswell/gma.c: Refactor CdClk init code
......................................................................
Patch Set 3: Code-Review+1
(1 comment)
File src/northbridge/intel/haswell/gma.c:
https://review.coreboot.org/c/coreboot/+/50136/comment/3ca78125_2b8b66ff 
PS3, Line 369:  *    ULX defaults to 337MHz with possible override for 450MHz
             :  *    ULT is fixed at 450MHz
             :  * others default  to 540MHz with possible override for 450MHz
The indentation and alingment looks strange to me.
-- 
To view, visit https://review.coreboot.org/c/coreboot/+/50136
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iaa9e9085d5dca0ced7bed4ca8fece139c29bc46c
Gerrit-Change-Number: 50136
Gerrit-PatchSet: 3
Gerrit-Owner: Angel Pons th3fanbus@gmail.com
Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz
Gerrit-Reviewer: Jamal Wright Crabstorage@getbackinthe.kitchen
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Paul Menzel paulepanter@mailbox.org
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-Attention: Angel Pons th3fanbus@gmail.com
Gerrit-Attention: Patrick Rudolph siro@das-labor.org
Gerrit-Comment-Date: Sun, 01 Aug 2021 08:38:31 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment