Maulik V Vaghela has uploaded a new patch set (#3) to the change originally created by Krishna P Bhat D. ( https://review.coreboot.org/c/coreboot/+/49012 )
Change subject: soc/intel/jasperlake: Enable USB PG for s0ix qualification ......................................................................
soc/intel/jasperlake: Enable USB PG for s0ix qualification
USBSUSPGQDIS is a disqualifier bit which will allow platform to enter s0ix even if USB is not power gated. Disabling this bit will ensure that USB is power gated before entering s0ix.
BUG=b:175767084 BRANCH=dedede TEST=s0ix works on drawcia and USB wake from s0ix works fine.
Change-Id: I20bad3f79141799c88a16272ea822b9e3dede504 Signed-off-by: Krishna Prasad Bhat krishna.p.bhat.d@intel.com --- M src/soc/intel/jasperlake/finalize.c M src/soc/intel/jasperlake/include/soc/pmc.h 2 files changed, 13 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/49012/3