Change in coreboot[master]: soc/intel/*:[WIP] enable FSP-M decompression at execution

[Paul Menzel (Code Review)]

Attention is currently required from: Rizwan Qureshi, Tim Wawrzynczak.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63397 )

Change subject: soc/intel/*:[WIP] enable FSP-M decompression at execution
......................................................................

Patch Set 1:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/63397/comment/3966e514_af9ebfec 
PS1, Line 9: FSP-M is compressed and is not more XIP. Hence remove the FSP_M_XIP config.
           : The FSP-M decompression requires more CAR memory. Increase CAR region size
           : to 2.5 MB. As per the system adress MAP we will be breaching the LAPIC base
           : address and HPET addresses hence rebase the CAR memory to somewhere safe.
           : Also increase the required stack szie
Please reflow for 72 characters per line.

https://review.coreboot.org/c/coreboot/+/63397/comment/b77fdf38_9a455096 
PS1, Line 13: szie
size