Change in ...coreboot[master]: {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29662 )

Change subject: {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support
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Patch Set 47:

(1 comment)
> > > this change breaks google/cyan variants, bootloops and no console output to triage (even with BOOTBLOCK_CONSOLE added)
> >
> > I assume you used the downstream FSP binary for this test? Please also
> > mention your post-code findings here for reference.
>
> Tested with the SecureBootEnabled version.
>
> What do you expect for 'post-code findings'?

This was related to Matt's comment, see quote.

https://review.coreboot.org/#/c/29662/47/src/drivers/intel/fsp1_1/cache_as_r... 
File src/drivers/intel/fsp1_1/cache_as_ram.S:

https://review.coreboot.org/#/c/29662/47/src/drivers/intel/fsp1_1/cache_as_r... 
PS47, Line 57: 	jmp	find_fsp
> IMO this code has not been changed by this patchset.

But it should have been. The called code is compiled by a different
compiler now, afaict (romcc vs gcc).