[M] Change in coreboot[main]: mb/intel/mtlrvp: Add new MTL-P board variant for PD solution
Jay Patel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78282?usp=email )
Change subject: mb/intel/mtlrvp: Add new MTL-P board variant for PD solution ......................................................................
mb/intel/mtlrvp: Add new MTL-P board variant for PD solution
This patch will add new board variant to enable PD chip based type-C solution for MTL-RVP
BUG=b:303839908 BRANCH=none TEST=check if you can observe MTLRVP PD solutin option as part of make menuconfig. Able to boot to ChromeOS with PD solution.
Change-Id: I8c98f08e143ac4ea620aca049e22f4e1e2f97e9e Signed-off-by: Jay Patel jay2.patel@intel.com --- M src/mainboard/intel/mtlrvp/Kconfig M src/mainboard/intel/mtlrvp/Kconfig.name M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb M src/mainboard/intel/mtlrvp/variants/mtlrvp_p/overridetree.cb M src/mainboard/intel/mtlrvp/variants/mtlrvp_p_ext_ec/overridetree.cb A src/mainboard/intel/mtlrvp/variants/mtlrvp_pd/overridetree.cb 6 files changed, 76 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/78282/1
diff --git a/src/mainboard/intel/mtlrvp/Kconfig b/src/mainboard/intel/mtlrvp/Kconfig index f225aa5..29ad74b 100644 --- a/src/mainboard/intel/mtlrvp/Kconfig +++ b/src/mainboard/intel/mtlrvp/Kconfig @@ -33,6 +33,10 @@ select EC_GOOGLE_CHROMEEC_MEC select SOC_INTEL_METEORLAKE_PRE_PRODUCTION_SILICON
+config BOARD_INTEL_MTLRVP_PD + select BOARD_EXT_EC_SPECIFIC_OPTIONS + select SOC_INTEL_METEORLAKE_PRE_PRODUCTION_SILICON + config BOARD_EXT_EC_SPECIFIC_OPTIONS def_bool n select BOARD_INTEL_MTLRVP_COMMON @@ -61,7 +65,7 @@
config BASEBOARD_DIR string - default "mtlrvp_p" if BOARD_INTEL_MTLRVP_P || BOARD_INTEL_MTLRVP_P_EXT_EC || BOARD_INTEL_MTLRVP_P_MCHP + default "mtlrvp_p" if BOARD_INTEL_MTLRVP_P || BOARD_INTEL_MTLRVP_P_EXT_EC || BOARD_INTEL_MTLRVP_P_MCHP || BOARD_INTEL_MTLRVP_PD
config GBB_HWID string @@ -84,6 +88,7 @@ string default "mtlrvp_p" if BOARD_INTEL_MTLRVP_P default "mtlrvp_p_ext_ec" if BOARD_INTEL_MTLRVP_P_EXT_EC || BOARD_INTEL_MTLRVP_P_MCHP + default "mtlrvp_pd" if BOARD_INTEL_MTLRVP_PD
config DEVICETREE string diff --git a/src/mainboard/intel/mtlrvp/Kconfig.name b/src/mainboard/intel/mtlrvp/Kconfig.name index 9f61aff..bff33da 100644 --- a/src/mainboard/intel/mtlrvp/Kconfig.name +++ b/src/mainboard/intel/mtlrvp/Kconfig.name @@ -6,3 +6,6 @@
config BOARD_INTEL_MTLRVP_P_MCHP bool "Meteorlake-P RVP with Microchip EC" + +config BOARD_INTEL_MTLRVP_PD + bool "Meteorlake-P RVP with PD chip" diff --git a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb index 17a92a8..b9e3361 100644 --- a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb +++ b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb @@ -234,18 +234,6 @@ register "group" = "ACPI_PLD_GROUP(3, 2)" device ref tcss_usb3_port1 on end end - chip drivers/usb/acpi - register "desc" = ""USB3 Type-C Port C2"" - register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(2, 2)" - device ref tcss_usb3_port2 on end - end - chip drivers/usb/acpi - register "desc" = ""USB3 Type-C Port C3"" - register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(1, 2)" - device ref tcss_usb3_port3 on end - end end end end diff --git a/src/mainboard/intel/mtlrvp/variants/mtlrvp_p/overridetree.cb b/src/mainboard/intel/mtlrvp/variants/mtlrvp_p/overridetree.cb index 7ca0024..b13c74e 100644 --- a/src/mainboard/intel/mtlrvp/variants/mtlrvp_p/overridetree.cb +++ b/src/mainboard/intel/mtlrvp/variants/mtlrvp_p/overridetree.cb @@ -1,4 +1,24 @@ chip soc/intel/meteorlake
- device domain 0 on end + device domain 0 on + device ref tcss_xhci on + chip drivers/usb/acpi + device ref tcss_root_hub on + chip drivers/usb/acpi + register "desc" = ""USB3 Type-C Port C2"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "group" = "ACPI_PLD_GROUP(2, 2)" + device ref tcss_usb3_port2 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3 Type-C Port C3"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "group" = "ACPI_PLD_GROUP(1, 2)" + device ref tcss_usb3_port3 on end + end + end + end + end + end + end diff --git a/src/mainboard/intel/mtlrvp/variants/mtlrvp_p_ext_ec/overridetree.cb b/src/mainboard/intel/mtlrvp/variants/mtlrvp_p_ext_ec/overridetree.cb index 3f1579e..a2244aa 100644 --- a/src/mainboard/intel/mtlrvp/variants/mtlrvp_p_ext_ec/overridetree.cb +++ b/src/mainboard/intel/mtlrvp/variants/mtlrvp_p_ext_ec/overridetree.cb @@ -10,6 +10,24 @@ device pnp 0c09.0 on end end end + device ref tcss_xhci on + chip drivers/usb/acpi + device ref tcss_root_hub on + chip drivers/usb/acpi + register "desc" = ""USB3 Type-C Port C2"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "group" = "ACPI_PLD_GROUP(2, 2)" + device ref tcss_usb3_port2 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3 Type-C Port C3"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "group" = "ACPI_PLD_GROUP(1, 2)" + device ref tcss_usb3_port3 on end + end + end + end + end device ref pmc hidden chip drivers/intel/pmc_mux device generic 0 on diff --git a/src/mainboard/intel/mtlrvp/variants/mtlrvp_pd/overridetree.cb b/src/mainboard/intel/mtlrvp/variants/mtlrvp_pd/overridetree.cb new file mode 100644 index 0000000..7cfbbcc --- /dev/null +++ b/src/mainboard/intel/mtlrvp/variants/mtlrvp_pd/overridetree.cb @@ -0,0 +1,28 @@ +chip soc/intel/meteorlake + + device domain 0 on + device ref soc_espi on + chip ec/google/chromeec + use conn0 as mux_conn[0] + use conn1 as mux_conn[1] + device pnp 0c09.0 on end + end + end + device ref pmc hidden + chip drivers/intel/pmc_mux + device generic 0 on + chip drivers/intel/pmc_mux/conn + use usb2_port1 as usb2_port + use tcss_usb3_port0 as usb3_port + device generic 0 alias conn0 on end + end + chip drivers/intel/pmc_mux/conn + use usb2_port2 as usb2_port + use tcss_usb3_port1 as usb3_port + device generic 1 alias conn1 on end + end + end + end + end + end +end
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Jay Patel (Code Review)