Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34828 )
Change subject: nb/intel/gm45: Call ddr3_calibrate_zq() only for DDR3 :) ......................................................................
nb/intel/gm45: Call ddr3_calibrate_zq() only for DDR3 :)
Change-Id: I7d00ddf727e7250b767a1c4b58bf11b17e900fc1 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/northbridge/intel/gm45/raminit.c 1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/34828/1
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c index 80e5f02..1af50f5 100644 --- a/src/northbridge/intel/gm45/raminit.c +++ b/src/northbridge/intel/gm45/raminit.c @@ -2011,7 +2011,8 @@
/* Perform ZQ calibration for DDR3. */ - ddr3_calibrate_zq(); + if (sysinfo->spd_type == DDR3) + ddr3_calibrate_zq();
/* Perform receive-enable calibration. */ raminit_receive_enable_calibration(timings, dimms);
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34828 )
Change subject: nb/intel/gm45: Call ddr3_calibrate_zq() only for DDR3 :) ......................................................................
Patch Set 2: Code-Review+2
(1 comment)
DDR2 path worked, DDR3 path is assumed to be proven to work beforehand and proof holds on with this change.
https://review.coreboot.org/c/coreboot/+/34828/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34828/2//COMMIT_MSG@7 PS2, Line 7: :) :)
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34828 )
Change subject: nb/intel/gm45: Call ddr3_calibrate_zq() only for DDR3 :) ......................................................................
nb/intel/gm45: Call ddr3_calibrate_zq() only for DDR3 :)
Change-Id: I7d00ddf727e7250b767a1c4b58bf11b17e900fc1 Signed-off-by: Nico Huber nico.h@gmx.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/34828 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/intel/gm45/raminit.c 1 file changed, 2 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c index b7ccdec..7a30b76 100644 --- a/src/northbridge/intel/gm45/raminit.c +++ b/src/northbridge/intel/gm45/raminit.c @@ -1799,7 +1799,8 @@
/* Perform ZQ calibration for DDR3. */ - ddr3_calibrate_zq(); + if (sysinfo->spd_type == DDR3) + ddr3_calibrate_zq();
/* Perform receive-enable calibration. */ raminit_receive_enable_calibration(timings, dimms);
-
Angel Pons (Code Review) -
Nico Huber (Code Review)
-
Patrick Georgi (Code Review)