Attention is currently required from: Hung-Te Lin, Martin Roth. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49819 )
Change subject: TEST-ONLY: dramc: mt8192: change architecture ......................................................................
Patch Set 2:
(90 comments)
File src/soc/mediatek/common/dramc/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/49819/comment/048ffd32_def88431 PS2, Line 218: trailing whitespace
https://review.coreboot.org/c/coreboot/+/49819/comment/3e699b18_0c0b07d1 PS2, Line 221: trailing whitespace
https://review.coreboot.org/c/coreboot/+/49819/comment/0e644767_a9307a25 PS2, Line 282: /* set avaiable voltage for the cali */ 'avaiable' may be misspelled - perhaps 'available'?
https://review.coreboot.org/c/coreboot/+/49819/comment/65a9e183_646a1fbb PS2, Line 315: dramc_info("%u Mbps calibration finish\n", get_frequency(cali) * DRAMC_DDR_MULTIPLE); line over 96 characters
File src/soc/mediatek/common/dramc/dramc_power.c:
https://review.coreboot.org/c/coreboot/+/49819/comment/78c15639_9747bdde PS2, Line 173: else { else is not generally useful after a break or return
File src/soc/mediatek/common/dramc/include/soc/dramc_common.h:
https://review.coreboot.org/c/coreboot/+/49819/comment/0ff30e20_33109783 PS2, Line 6: /* trailing whitespace
https://review.coreboot.org/c/coreboot/+/49819/comment/cbd72941_d17f7fc8 PS2, Line 10: * By default: MAX CHANNLE: 2, MAX RANK: 2, MAX FSP: 2. 'CHANNLE' may be misspelled - perhaps 'CHANNEL'?
File src/soc/mediatek/common/dramc/include/soc/dramc_ops.h:
https://review.coreboot.org/c/coreboot/+/49819/comment/73f10836_504fa208 PS2, Line 1: /* SPDX-License-Identifier: GPL-2.0-only */ DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/aa60cc34_7dd3a958 PS2, Line 2: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/eec288cb_a2bc3f4b PS2, Line 3: #ifndef SOC_MEDIATEK_DRAMC_OPS_H DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/82993a56_51edb72b PS2, Line 4: #define SOC_MEDIATEK_DRAMC_OPS_H DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/0120700b_b01df35c PS2, Line 5: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/e2ef679a_45cf80da PS2, Line 6: #include <soc/dramc_common.h> DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/463cb295_f2e377f6 PS2, Line 7: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/3d3ce4c1_b44589be PS2, Line 8: struct ddr_cali; DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/9b027895_17d7f73b PS2, Line 9: struct emi_mdl; DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/feecffed_027cfb26 PS2, Line 10: struct dram_impedance; DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/6d1bef2d_933a352d PS2, Line 11: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/1f4da492_35da8bbb PS2, Line 12: typedef struct dramc_cal_ops { DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/e79e2088_232eadad PS2, Line 13: /* boradcast for multi channel */ DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/df35f256_66b4353d PS2, Line 14: u32 (*get_broadcast)(void); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/a60ab4a8_fd815734 PS2, Line 15: void (*set_broadcast)(u32 onoff); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/f56d2370_5e7c8822 PS2, Line 16: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/67db23f6_59526414 PS2, Line 17: /* memory pll */ DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/b12fa0fc_d7f3d9d8 PS2, Line 18: u32 (*mpll_init)(void); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/86d75efe_b5371697 PS2, Line 19: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/9c759947_a43ae8db PS2, Line 20: /* pinmux */ DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/241a4d28_22c6790a PS2, Line 21: void (*get_dram_pinmux)(struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/37a072e8_cc519a04 PS2, Line 22: void (*set_mrr_pinmux_mapping)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/356544d2_8f537aa2 PS2, Line 23: void (*set_dqo1_pinmux_mapping)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/4fb31b4a_4f924dfc PS2, Line 24: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/820f2f57_639e68f9 PS2, Line 25: /* EMI */ DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/c1e434f8_8b370370 PS2, Line 26: void (*emi_mdl_init)(const struct emi_mdl *emi_con); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/ff7b420c_4c58cd2e PS2, Line 27: void (*emi_init_before_first_cal)(void); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/444a2d1e_8a4aedf8 PS2, Line 28: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/b07f4b7c_22666894 PS2, Line 29: /* FSP */ DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/32ee8977_f2297def PS2, Line 30: u8 (*get_fsp_by_freq)(dram_freq_grp freq_grp); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/b8f112da_3641a56e PS2, Line 31: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/daf154b1_91cecf8e PS2, Line 32: /* DBI */ DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/c686fbb6_13fe6415 PS2, Line 33: void (*update_wdbi_on_off)(struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/11b6b7ef_a1c8c810 PS2, Line 34: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/0d49c811_b3b6fbf9 PS2, Line 35: /* ODT */ DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/c590b31b_c70a74e2 PS2, Line 36: dram_odt_state (*update_odt_on_off)(struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/59f24611_5b31741d PS2, Line 37: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/15d92629_6a70a412 PS2, Line 38: /* cali struct init, if NULL, use default */ DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/f0453ea1_ec0771be PS2, Line 39: void (*init_ddr_cali_struct)(struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/bb310f83_4870724e PS2, Line 40: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/fb96a537_d6fdd1fe PS2, Line 41: /* save dram info to registers */ DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/a4bd0be1_6168bd97 PS2, Line 42: void (*set_dram_info_to_conf)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/6e6a4146_145eddac PS2, Line 43: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/ea275846_b10f7095 PS2, Line 44: /* impedance */ DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/fbc3ba19_fad94298 PS2, Line 45: void (*sw_impedance_cal)(dram_odt_state odt, DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/d9f6750b_0bf5a72a PS2, Line 46: struct dram_impedance *imp); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/99d6d2dd_9a9dc3cc PS2, Line 47: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/665c876c_3a952f6f PS2, Line 48: /* trailing whitespace
https://review.coreboot.org/c/coreboot/+/49819/comment/d5287677_015c9fbc PS2, Line 49: * dram voltage trailing whitespace
https://review.coreboot.org/c/coreboot/+/49819/comment/9d86d594_d2ff6f3d PS2, Line 50: */ DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/1182e81a_a37ed13a PS2, Line 51: void (*set_vcore_voltage)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/a1297102_85291c64 PS2, Line 52: void (*set_vdd1_voltage)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/cfd93cfc_eaa74af8 PS2, Line 53: void (*set_vdd2_voltage)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/3b13d4dd_c9e1679c PS2, Line 54: void (*set_vddq_voltage)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/c1b54362_5705139e PS2, Line 55: void (*set_vmddr_voltage)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/378a5267_7d7c7e8a PS2, Line 56: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/d88b000a_fd3f8434 PS2, Line 57: u32 (*get_vcore_voltage)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/7335084a_83edcba5 PS2, Line 58: u32 (*get_vdd1_voltage)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/5aa00796_64d86f46 PS2, Line 59: u32 (*get_vdd2_voltage)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/33032b12_af8d9f21 PS2, Line 60: u32 (*get_vddq_voltage)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/8537b7d9_2aa6c890 PS2, Line 61: u32 (*get_vmddr_voltage)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/3e083f03_9901df8c PS2, Line 62: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/6c64b6cf_62a77b4e PS2, Line 63: u32 (*get_vcore_value)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/53aae680_61564db8 PS2, Line 64: u32 (*get_vdd1_value)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/6915bc69_e889935d PS2, Line 65: u32 (*get_vdd2_value)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/be8ef389_73f50332 PS2, Line 66: u32 (*get_vddq_value)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/5eb9fcfe_0acebd7e PS2, Line 67: u32 (*get_vmddr_value)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/9e637436_76ebea5d PS2, Line 68: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/149abf6d_cbe1f70e PS2, Line 69: /* set dram related volatage except VCORE, eg: VDD1/VDD2/VDDQ/VMDDR */ DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/d676a3a9_91aebb4d PS2, Line 70: void (*set_dram_voltage)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/ef175228_e3e94497 PS2, Line 71: void (*dump_dram_voltage)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/6efabde1_29cf020a PS2, Line 72: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/29ff6e08_0926acf0 PS2, Line 73: /* dramc init */ DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/8a8c1bcb_c938f77f PS2, Line 74: void (*init_default_mr_value)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/f09884ef_7a6f85dc PS2, Line 75: void (*init)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/245341e1_9f09ea7d PS2, Line 76: void (*init_before_calibration)(const struct ddr_cali *cali); DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/4a394c2d_46da01d4 PS2, Line 77: } dramc_cal_ops; DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/bf00a3bf_d97696d3 PS2, Line 78: DOS line endings
https://review.coreboot.org/c/coreboot/+/49819/comment/fbc03b51_9f00638b PS2, Line 79: #endif DOS line endings
File src/soc/mediatek/mt8192/mem_init.c:
https://review.coreboot.org/c/coreboot/+/49819/comment/54e4fdde_bfeda0c3 PS2, Line 178: return (cali->fsp == FSP_0) ? ODT_OFF : ODT_ON; Statements should start on a tabstop
https://review.coreboot.org/c/coreboot/+/49819/comment/fc88e1a3_56b15106 PS2, Line 5049: SET32_BITFIELDS(&ch[chn].ao.shu_ac_time_05t, SHU_AC_TIME_05T_TRFC_05T, trfc_05t); line over 96 characters
https://review.coreboot.org/c/coreboot/+/49819/comment/72090394_3d3166c4 PS2, Line 5052: SET32_BITFIELDS(&ch[chn].ao.shu_ac_time_05t, SHU_AC_TIME_05T_TRFCPB_05T, trfrc_pb05t); line over 96 characters
https://review.coreboot.org/c/coreboot/+/49819/comment/a1bb861b_6fff81cf PS2, Line 5170: trailing whitespace
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