Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37154 )
Change subject: Kconfig: Flip the meaning of C_ENVIRONMENT_BOOTBLOCK ......................................................................
Kconfig: Flip the meaning of C_ENVIRONMENT_BOOTBLOCK
The romcc bootblock will be deprecated soon and most platforms use C_ENVIRONMENT_BOOTBLOCK already.
Change-Id: I773a76aade623303b7cd95ebe9b0411e5a7ecbaf Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/Kconfig M src/arch/arm/Kconfig M src/arch/arm64/Kconfig M src/arch/ppc64/Kconfig M src/arch/riscv/Kconfig M src/arch/x86/Kconfig M src/arch/x86/Makefile.inc M src/arch/x86/assembly_entry.S M src/arch/x86/bootblock_crt0.S M src/arch/x86/bootblock_romcc.S M src/arch/x86/car.ld M src/arch/x86/include/arch/cpu.h M src/arch/x86/memlayout.ld M src/console/Kconfig M src/cpu/intel/car/non-evict/cache_as_ram.S M src/cpu/intel/car/p3/cache_as_ram.S M src/cpu/intel/car/romstage.c M src/cpu/intel/microcode/Kconfig M src/cpu/intel/model_1067x/Kconfig M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_6fx/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/qemu-x86/Kconfig M src/cpu/x86/16bit/entry16.inc M src/cpu/x86/Kconfig M src/lib/Makefile.inc M src/mainboard/facebook/fbg1701/Makefile.inc M src/mainboard/portwell/m107/Makefile.inc M src/northbridge/amd/agesa/Kconfig M src/northbridge/amd/pi/Kconfig M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/i440bx/Kconfig M src/northbridge/intel/i945/Kconfig M src/northbridge/intel/nehalem/Kconfig M src/northbridge/intel/pineview/Kconfig M src/northbridge/intel/x4x/Kconfig M src/security/vboot/Kconfig M src/soc/amd/picasso/Kconfig M src/soc/amd/stoneyridge/Kconfig M src/soc/intel/apollolake/Kconfig M src/soc/intel/baytrail/Kconfig M src/soc/intel/braswell/Kconfig M src/soc/intel/broadwell/Kconfig M src/soc/intel/cannonlake/Kconfig M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/icelake/Kconfig M src/soc/intel/quark/Kconfig M src/soc/intel/skylake/Kconfig M src/soc/intel/tigerlake/Kconfig M src/vendorcode/eltan/security/verified_boot/Makefile.inc M src/vendorcode/eltan/security/verified_boot/vboot_check.c 53 files changed, 48 insertions(+), 78 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/37154/1
diff --git a/src/Kconfig b/src/Kconfig index ba9ae86..dddba2d 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -1193,9 +1193,7 @@ # src/lib/bootblock.c#main() C entry point. bool
-config C_ENVIRONMENT_BOOTBLOCK - # To be selected by arch or platform if a C environment is available during the - # bootblock. Normally this signifies availability of RW memory (e.g. SRAM). +config ROMCC_BOOTBLOCK bool
############################################################################### diff --git a/src/arch/arm/Kconfig b/src/arch/arm/Kconfig index 47c333b..7b19339 100644 --- a/src/arch/arm/Kconfig +++ b/src/arch/arm/Kconfig @@ -4,7 +4,6 @@ config ARCH_BOOTBLOCK_ARM bool select ARCH_ARM - select C_ENVIRONMENT_BOOTBLOCK
config ARCH_VERSTAGE_ARM bool diff --git a/src/arch/arm64/Kconfig b/src/arch/arm64/Kconfig index 3d1d184..632d1bd 100644 --- a/src/arch/arm64/Kconfig +++ b/src/arch/arm64/Kconfig @@ -4,7 +4,6 @@ config ARCH_BOOTBLOCK_ARM64 bool select ARCH_ARM64 - select C_ENVIRONMENT_BOOTBLOCK
config ARCH_VERSTAGE_ARM64 bool diff --git a/src/arch/ppc64/Kconfig b/src/arch/ppc64/Kconfig index 0699e91..44dbb1d 100644 --- a/src/arch/ppc64/Kconfig +++ b/src/arch/ppc64/Kconfig @@ -5,7 +5,6 @@ bool select ARCH_PPC64 select BOOTBLOCK_CUSTOM - select C_ENVIRONMENT_BOOTBLOCK
config ARCH_VERSTAGE_PPC64 bool diff --git a/src/arch/riscv/Kconfig b/src/arch/riscv/Kconfig index f2ca571..8369afe 100644 --- a/src/arch/riscv/Kconfig +++ b/src/arch/riscv/Kconfig @@ -77,7 +77,6 @@ config ARCH_BOOTBLOCK_RISCV bool default n - select C_ENVIRONMENT_BOOTBLOCK
config ARCH_VERSTAGE_RISCV bool diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 24a2065..a788bc0 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -23,7 +23,7 @@ bool default n select ARCH_X86 - select BOOTBLOCK_CUSTOM if !C_ENVIRONMENT_BOOTBLOCK + select BOOTBLOCK_CUSTOM if ROMCC_BOOTBLOCK
config ARCH_VERSTAGE_X86_32 bool @@ -47,7 +47,7 @@ bool default n select ARCH_X86 - select BOOTBLOCK_CUSTOM if !C_ENVIRONMENT_BOOTBLOCK + select BOOTBLOCK_CUSTOM if ROMCC_BOOTBLOCK
config ARCH_VERSTAGE_X86_64 bool @@ -199,7 +199,7 @@ hex default 0x80
-# 64KiB default bootblock size when employing C_ENVIRONMENT_BOOTBLOCK. +# 64KiB default bootblock size config C_ENV_BOOTBLOCK_SIZE hex default 0x10000 @@ -239,7 +239,7 @@ choice prompt "Bootblock behaviour" default BOOTBLOCK_SIMPLE - depends on !C_ENVIRONMENT_BOOTBLOCK + depends on ROMCC_BOOTBLOCK
config BOOTBLOCK_SIMPLE bool "Always load fallback" diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index cc094d1..b810015 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -116,7 +116,7 @@ bootblock-y += id.S $(call src-to-obj,bootblock,$(dir)/id.S): $(obj)/build.h
-ifeq ($(CONFIG_C_ENVIRONMENT_BOOTBLOCK),y) +ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y)
bootblock-y += bootblock_crt0.S
@@ -128,7 +128,7 @@
bootblock-$(CONFIG_ARCH_BOOTBLOCK_X86_32) += walkcbfs.S
-else # !C_ENVIRONMENT_BOOTBLOCK +else # !ROMCC_BOOTBLOCK
# x86-specific linker flags ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32),y) @@ -178,7 +178,7 @@ $(filter-out %.ld,$(bootblock-objs)) \ -T $(call src-to-obj,bootblock,src/arch/x86/bootblock.ld)
-endif # C_ENVIRONMENT_BOOTBLOCK +endif # ROMCC_BOOTBLOCK
endif # CONFIG_ARCH_BOOTBLOCK_X86_32 / CONFIG_ARCH_BOOTBLOCK_X86_64 @@ -223,7 +223,9 @@ romstage-$(CONFIG_HAVE_ACPI_RESUME) += acpi_s3.c # gdt_init.S is included by entry32.inc when romstage is the first C # environment. -romstage-$(CONFIG_C_ENVIRONMENT_BOOTBLOCK) += gdt_init.S +ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y) +romstage-y += gdt_init.S +endif romstage-y += cbmem.c romstage-y += cbfs_and_run.c romstage-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c diff --git a/src/arch/x86/assembly_entry.S b/src/arch/x86/assembly_entry.S index d9d6d4e..31fc538 100644 --- a/src/arch/x86/assembly_entry.S +++ b/src/arch/x86/assembly_entry.S @@ -13,14 +13,13 @@
#include <rules.h>
-#if CONFIG(C_ENVIRONMENT_BOOTBLOCK) +#if !CONFIG(ROMCC_BOOTBLOCK)
/* - * This path is for stages that are post bootblock when employing - * CONFIG_C_ENVIRONMENT_BOOTBLOCK. The gdt is reloaded to accommodate - * platforms that are executing out of CAR. In order to continue with - * C code execution one needs to set stack pointer and clear CAR_GLOBAL - * variables that are stage specific. + * This path is for stages that are post bootblock. The gdt is reloaded + * to accommodate platforms that are executing out of CAR. In order to + * continue with C code execution one needs to set stack pointer and + * clear .bss/CAR_GLOBAL variables that are stage specific. */ .section ".text._start", "ax", @progbits .global _start diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S index 9fcb5c4..3256731 100644 --- a/src/arch/x86/bootblock_crt0.S +++ b/src/arch/x86/bootblock_crt0.S @@ -11,8 +11,7 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * This is the modern bootblock. It is used by platforms which select - * C_ENVIRONMENT_BOOTBLOCK, and it prepares the system for C environment runtime + * This is the modern bootblock. It prepares the system for C environment runtime * setup. The actual setup is done by hardware-specific code. * * It provides a bootflow similar to other architectures, and thus is considered diff --git a/src/arch/x86/bootblock_romcc.S b/src/arch/x86/bootblock_romcc.S index 05b34c6..7d6f42f 100644 --- a/src/arch/x86/bootblock_romcc.S +++ b/src/arch/x86/bootblock_romcc.S @@ -20,7 +20,7 @@ * - timestamp.inc: store TSC in MMX registers * - generated/bootblock.inc: ROMCC part of the bootblock * - * This is used on platforms which do not select C_ENVIRONMENT_BOOTBLOCK, and it + * This is used on platforms which select ROMCC_BOOTBLOCK, and it * tries to do the absolute minimum before walking CBFS and jumping to romstage. * * This file assembles the bootblock program by the order of the includes. Thus, diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld index 3680250..483a908 100644 --- a/src/arch/x86/car.ld +++ b/src/arch/x86/car.ld @@ -36,7 +36,7 @@ /* Stack for CAR stages. Since it persists across all stages that * use CAR it can be reused. The chipset/SoC is expected to provide * the stack size. */ -#if CONFIG(C_ENVIRONMENT_BOOTBLOCK) +#if !CONFIG(ROMCC_BOOTBLOCK) _car_stack = .; . += CONFIG_DCACHE_BSP_STACK_SIZE; _ecar_stack = .; @@ -90,7 +90,7 @@ _ebss = .; _car_unallocated_start = .;
-#if !CONFIG(C_ENVIRONMENT_BOOTBLOCK) +#if CONFIG(ROMCC_BOOTBLOCK) _car_stack = .; _ecar_stack = _car_region_end; #endif @@ -121,6 +121,6 @@ #if CONFIG(PAGING_IN_CACHE_AS_RAM) _bogus2 = ASSERT(_pagetables == ALIGN(_pagetables, 4096), "_pagetables aren't 4KiB aligned"); #endif -#if CONFIG(C_ENVIRONMENT_BOOTBLOCK) +#if !CONFIG(ROMCC_BOOTBLOCK) _bogus3 = ASSERT(CONFIG_DCACHE_BSP_STACK_SIZE > 0x0, "BSP stack size not configured"); #endif diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index e0e3ca1..6b49ecd 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -288,7 +288,7 @@ #define asmlinkage __attribute__((regparm(0)))
/* - * When using CONFIG_C_ENVIRONMENT_BOOTBLOCK the car_stage_entry() + * When using not using a romcc bootblock the car_stage_entry() * is the symbol jumped to for each stage after bootblock using * cache-as-ram. */ diff --git a/src/arch/x86/memlayout.ld b/src/arch/x86/memlayout.ld index 9fd9889..4fa73b4 100644 --- a/src/arch/x86/memlayout.ld +++ b/src/arch/x86/memlayout.ld @@ -49,8 +49,7 @@
#include EARLY_MEMLAYOUT #elif ENV_BOOTBLOCK - /* This is for C_ENVIRONMENT_BOOTBLOCK. arch/x86/bootblock.ld contains - * the logic for the romcc linking. */ + /* arch/x86/bootblock.ld contains the logic for the romcc bootblock linking. */ BOOTBLOCK(0xffffffff - CONFIG_C_ENV_BOOTBLOCK_SIZE + 1, CONFIG_C_ENV_BOOTBLOCK_SIZE)
diff --git a/src/console/Kconfig b/src/console/Kconfig index e767edd..bfb0e29 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -5,7 +5,7 @@
config BOOTBLOCK_CONSOLE bool "Enable early (bootblock) console output." - depends on C_ENVIRONMENT_BOOTBLOCK && !NO_BOOTBLOCK_CONSOLE + depends on !ROMCC_BOOTBLOCK && !NO_BOOTBLOCK_CONSOLE default y help Use console during the bootblock if supported diff --git a/src/cpu/intel/car/non-evict/cache_as_ram.S b/src/cpu/intel/car/non-evict/cache_as_ram.S index cd69720..5a668c4 100644 --- a/src/cpu/intel/car/non-evict/cache_as_ram.S +++ b/src/cpu/intel/car/non-evict/cache_as_ram.S @@ -29,7 +29,7 @@
bootblock_pre_c_entry:
-#if CONFIG(C_ENVIRONMENT_BOOTBLOCK) +#if !CONFIG(ROMCC_BOOTBLOCK) movl $cache_as_ram, %esp /* return address */ jmp check_mtrr /* Check if CPU properly reset */ #endif diff --git a/src/cpu/intel/car/p3/cache_as_ram.S b/src/cpu/intel/car/p3/cache_as_ram.S index a3487db..23df701 100644 --- a/src/cpu/intel/car/p3/cache_as_ram.S +++ b/src/cpu/intel/car/p3/cache_as_ram.S @@ -18,7 +18,7 @@ #define CACHE_AS_RAM_SIZE CONFIG_DCACHE_RAM_SIZE #define CACHE_AS_RAM_BASE CONFIG_DCACHE_RAM_BASE
-#if CONFIG(C_ENVIRONMENT_BOOTBLOCK) +#if !CONFIG(ROMCC_BOOTBLOCK) #if ((CONFIG_C_ENV_BOOTBLOCK_SIZE & (CONFIG_C_ENV_BOOTBLOCK_SIZE - 1)) != 0) #error "CONFIG_C_ENV_BOOTBLOCK_SIZE must be a power of 2!" #endif diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c index 9d19635..8059a70 100644 --- a/src/cpu/intel/car/romstage.c +++ b/src/cpu/intel/car/romstage.c @@ -71,8 +71,8 @@ /* We do not return here. */ }
-#if !CONFIG(C_ENVIRONMENT_BOOTBLOCK) -/* This wrapper enables easy transition towards C_ENVIRONMENT_BOOTBLOCK, +#if CONFIG(ROMCC_BOOTBLOCK) +/* This wrapper enables easy transition away from ROMCC_BOOTBLOCK * keeping changes in cache_as_ram.S easy to manage. */ asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist) diff --git a/src/cpu/intel/microcode/Kconfig b/src/cpu/intel/microcode/Kconfig index b783892..c76b10b 100644 --- a/src/cpu/intel/microcode/Kconfig +++ b/src/cpu/intel/microcode/Kconfig @@ -1,7 +1,7 @@ config MICROCODE_UPDATE_PRE_RAM bool depends on SUPPORT_CPU_UCODE_IN_CBFS - default y if C_ENVIRONMENT_BOOTBLOCK + default n if ROMCC_BOOTBLOCK help Select this option if you want to update the microcode during the cache as ram setup. diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig index 564a428..79dda28 100644 --- a/src/cpu/intel/model_1067x/Kconfig +++ b/src/cpu/intel/model_1067x/Kconfig @@ -12,4 +12,4 @@ select SUPPORT_CPU_UCODE_IN_CBFS select CPU_INTEL_COMMON select CPU_INTEL_COMMON_TIMEBASE - select SETUP_XIP_CACHE if C_ENVIRONMENT_BOOTBLOCK + select SETUP_XIP_CACHE diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index f316329..e312605 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -21,7 +21,6 @@ select CPU_INTEL_COMMON_TIMEBASE select PARALLEL_MP select NO_FIXED_XIP_ROM_SIZE - select C_ENVIRONMENT_BOOTBLOCK
config SMM_TSEG_SIZE hex diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig index cfd3e7c..e3d327c 100644 --- a/src/cpu/intel/model_6fx/Kconfig +++ b/src/cpu/intel/model_6fx/Kconfig @@ -13,4 +13,4 @@ select SUPPORT_CPU_UCODE_IN_CBFS select CPU_INTEL_COMMON select CPU_INTEL_COMMON_TIMEBASE - select SETUP_XIP_CACHE if C_ENVIRONMENT_BOOTBLOCK + select SETUP_XIP_CACHE diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc index a7984a9..2f1c6b4 100644 --- a/src/cpu/intel/socket_LGA775/Makefile.inc +++ b/src/cpu/intel/socket_LGA775/Makefile.inc @@ -13,13 +13,9 @@ subdirs-y += ../hyperthreading subdirs-y += ../speedstep
-ifneq ($(CONFIG_C_ENVIRONMENT_BOOTBLOCK),y) -cpu_incs-y += $(src)/cpu/intel/car/p4-netburst/cache_as_ram.S -else bootblock-y += ../car/p4-netburst/cache_as_ram.S bootblock-y += ../car/bootblock.c bootblock-y += ../../x86/early_reset.S -endif
postcar-y += ../car/p4-netburst/exit_car.S
diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index a2ebeb2..176ae9e 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -11,7 +11,6 @@ select UDELAY_TSC select TSC_MONOTONIC_TIMER select SIPI_VECTOR_IN_ROM - select C_ENVIRONMENT_BOOTBLOCK select CPU_INTEL_COMMON select CPU_INTEL_COMMON_TIMEBASE
diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index 7504233..e6025b5 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -21,5 +21,4 @@ select UDELAY_TSC select TSC_MONOTONIC_TIMER select UNKNOWN_TSC_RATE - select C_ENVIRONMENT_BOOTBLOCK select SMM_ASEG diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc index 9e00c55..e0babd5 100644 --- a/src/cpu/x86/16bit/entry16.inc +++ b/src/cpu/x86/16bit/entry16.inc @@ -29,7 +29,7 @@
#include <arch/rom_segs.h>
-#if CONFIG(C_ENVIRONMENT_BOOTBLOCK) || \ +#if !CONFIG(ROMCC_BOOTBLOCK) || \ CONFIG(SIPI_VECTOR_IN_ROM) /* Symbol _start16bit must be aligned to 4kB to start AP CPUs with * Startup IPI message without RAM. diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 85ebd83..efb5fa9 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -77,7 +77,7 @@
config SETUP_XIP_CACHE bool - depends on C_ENVIRONMENT_BOOTBLOCK + depends on !ROMCC_BOOTBLOCK depends on !NO_XIP_EARLY_STAGES help Select this option to set up an MTRR to cache XIP stages loaded diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index dc0c46d..b444ea3 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -268,7 +268,9 @@ postcar-$(CONFIG_GENERIC_UDELAY) += timer.c
# Use program.ld for all the platforms which use C fo the bootblock. -bootblock-$(CONFIG_C_ENVIRONMENT_BOOTBLOCK) += program.ld +ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y) +bootblock-y += program.ld +endif
decompressor-y += program.ld postcar-y += program.ld diff --git a/src/mainboard/facebook/fbg1701/Makefile.inc b/src/mainboard/facebook/fbg1701/Makefile.inc index ac4e571..07b3e35 100644 --- a/src/mainboard/facebook/fbg1701/Makefile.inc +++ b/src/mainboard/facebook/fbg1701/Makefile.inc @@ -16,13 +16,13 @@ ##
ifneq ($(filter y,$(CONFIG_VENDORCODE_ELTAN_VBOOT) $(CONFIG_VENDORCODE_ELTAN_MBOOT)),) -bootblock-$(CONFIG_C_ENVIRONMENT_BOOTBLOCK) += board_verified_boot.c +bootblock-y += board_verified_boot.c postcar-y += board_verified_boot.c ramstage-y += board_verified_boot.c romstage-y += board_verified_boot.c endif
-bootblock-$(CONFIG_C_ENVIRONMENT_BOOTBLOCK) += com_init.c +bootblock-y += com_init.c
ramstage-y += cpld.c ramstage-y += gpio.c diff --git a/src/mainboard/portwell/m107/Makefile.inc b/src/mainboard/portwell/m107/Makefile.inc index 7d4725ef..5d88549 100644 --- a/src/mainboard/portwell/m107/Makefile.inc +++ b/src/mainboard/portwell/m107/Makefile.inc @@ -15,7 +15,7 @@ ## GNU General Public License for more details. ##
-bootblock-$(CONFIG_C_ENVIRONMENT_BOOTBLOCK) += com_init.c +bootblock-y += com_init.c
ramstage-y += gpio.c ramstage-y += hda_verb.c diff --git a/src/northbridge/amd/agesa/Kconfig b/src/northbridge/amd/agesa/Kconfig index e1e129a..50dba25 100644 --- a/src/northbridge/amd/agesa/Kconfig +++ b/src/northbridge/amd/agesa/Kconfig @@ -17,6 +17,7 @@ bool default CPU_AMD_AGESA select CBMEM_TOP_BACKUP + select ROMCC_BOOTBLOCK
if NORTHBRIDGE_AMD_AGESA
diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig index 65c6556..fb8cb43 100644 --- a/src/northbridge/amd/pi/Kconfig +++ b/src/northbridge/amd/pi/Kconfig @@ -18,6 +18,7 @@ default y if CPU_AMD_PI default n select CBMEM_TOP_BACKUP + select ROMCC_BOOTBLOCK
if NORTHBRIDGE_AMD_PI
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig index 4877fa9..69b055e 100644 --- a/src/northbridge/intel/gm45/Kconfig +++ b/src/northbridge/intel/gm45/Kconfig @@ -26,7 +26,6 @@ select INTEL_GMA_ACPI select INTEL_GMA_SSC_ALTERNATE_REF select PARALLEL_MP - select C_ENVIRONMENT_BOOTBLOCK
config VBOOT select VBOOT_STARTS_IN_BOOTBLOCK diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig index aad2674..6dc4ef0 100644 --- a/src/northbridge/intel/haswell/Kconfig +++ b/src/northbridge/intel/haswell/Kconfig @@ -19,7 +19,6 @@ select CACHE_MRC_SETTINGS select INTEL_DDI select INTEL_GMA_ACPI - select C_ENVIRONMENT_BOOTBLOCK select BOOTBLOCK_CONSOLE
if NORTHBRIDGE_INTEL_HASWELL diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig index df1e365..427af26 100644 --- a/src/northbridge/intel/i440bx/Kconfig +++ b/src/northbridge/intel/i440bx/Kconfig @@ -17,6 +17,7 @@ bool select NO_MMCONF_SUPPORT select HAVE_DEBUG_RAM_SETUP + select ROMCC_BOOTBLOCK
config SDRAMPWR_4DIMM bool diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig index a0550ec..c22275a 100644 --- a/src/northbridge/intel/i945/Kconfig +++ b/src/northbridge/intel/i945/Kconfig @@ -27,7 +27,6 @@ select INTEL_EDID select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT select PARALLEL_MP - select C_ENVIRONMENT_BOOTBLOCK
config NORTHBRIDGE_INTEL_SUBTYPE_I945GC def_bool n diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig index 7b56841..a119b81 100644 --- a/src/northbridge/intel/nehalem/Kconfig +++ b/src/northbridge/intel/nehalem/Kconfig @@ -21,7 +21,6 @@ select INTEL_GMA_ACPI select CACHE_MRC_SETTINGS select HAVE_DEBUG_RAM_SETUP - select C_ENVIRONMENT_BOOTBLOCK
if NORTHBRIDGE_INTEL_NEHALEM
diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig index edf4f23..7306036 100644 --- a/src/northbridge/intel/pineview/Kconfig +++ b/src/northbridge/intel/pineview/Kconfig @@ -28,7 +28,6 @@ select INTEL_EDID if MAINBOARD_DO_NATIVE_VGA_INIT select INTEL_GMA_ACPI select PARALLEL_MP - select C_ENVIRONMENT_BOOTBLOCK
config VGA_BIOS_ID string diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig index 2a54e24..247686a 100644 --- a/src/northbridge/intel/x4x/Kconfig +++ b/src/northbridge/intel/x4x/Kconfig @@ -26,7 +26,6 @@ select INTEL_GMA_ACPI select CACHE_MRC_SETTINGS select PARALLEL_MP - select C_ENVIRONMENT_BOOTBLOCK
config CBFS_SIZE hex diff --git a/src/security/vboot/Kconfig b/src/security/vboot/Kconfig index df1b7e4..a829443 100644 --- a/src/security/vboot/Kconfig +++ b/src/security/vboot/Kconfig @@ -95,7 +95,7 @@ config VBOOT_STARTS_IN_BOOTBLOCK bool default n - depends on C_ENVIRONMENT_BOOTBLOCK + depends on !ROMCC_BOOTBLOCK help Firmware verification happens during the end of or right after the bootblock. This implies that a static VBOOT2_WORK() buffer must be diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 5f9792b..e192818 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -49,7 +49,6 @@ select SOC_AMD_COMMON_BLOCK_HDA select SOC_AMD_COMMON_BLOCK_SATA select SOC_AMD_COMMON_BLOCK_S3 - select C_ENVIRONMENT_BOOTBLOCK select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select PARALLEL_MP @@ -82,7 +81,6 @@ default 0x10000
config DCACHE_BSP_STACK_SIZE - depends on C_ENVIRONMENT_BOOTBLOCK hex default 0x4000 help diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 0d6f2ff..cbf88df 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -69,7 +69,6 @@ select SOC_AMD_COMMON_BLOCK_PSP select SOC_AMD_COMMON_BLOCK_CAR select SOC_AMD_COMMON_BLOCK_S3 - select C_ENVIRONMENT_BOOTBLOCK select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select PARALLEL_MP @@ -98,7 +97,6 @@ default 0x10000
config DCACHE_BSP_STACK_SIZE - depends on C_ENVIRONMENT_BOOTBLOCK hex default 0x4000 help diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 026f6da..0b3b30a 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -38,7 +38,6 @@ select ACPI_NHLT select SOC_INTEL_COMMON_NHLT # Misc options - select C_ENVIRONMENT_BOOTBLOCK select CACHE_MRC_SETTINGS select COMMON_FADT select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 397e867..fac14cb 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -37,6 +37,7 @@ select INTEL_GMA_SWSMISCI select CPU_INTEL_COMMON select CPU_HAS_L2_ENABLE_MSR + select ROMCC_BOOTBLOCK
config VBOOT select VBOOT_MUST_REQUEST_DISPLAY diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 7ea0186..f08b589 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -46,7 +46,6 @@ select INTEL_GMA_SWSMISCI select CPU_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS - select C_ENVIRONMENT_BOOTBLOCK
config DCACHE_BSP_STACK_SIZE hex diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 095ed98..07bcf22 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -41,7 +41,6 @@ select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE select NO_FIXED_XIP_ROM_SIZE - select C_ENVIRONMENT_BOOTBLOCK
config PCIEXP_ASPM bool diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 5731cff..5c91ac1 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -58,7 +58,6 @@ select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES - select C_ENVIRONMENT_BOOTBLOCK select CACHE_MRC_SETTINGS select COMMON_FADT select CPU_INTEL_COMMON diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index cb3713d..0ce0d5b 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -32,7 +32,6 @@ select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET select PLATFORM_USES_FSP2_0 - select C_ENVIRONMENT_BOOTBLOCK select IOAPIC select HAVE_SMI_HANDLER select CACHE_MRC_SETTINGS diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 418c317..c196d4b 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -14,7 +14,6 @@ select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES - select C_ENVIRONMENT_BOOTBLOCK select CACHE_MRC_SETTINGS select COMMON_FADT select CPU_INTEL_FIRMWARE_INTERFACE_TABLE diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index 461d230..099c7dd 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -26,7 +26,6 @@ select ARCH_RAMSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_VERSTAGE_X86_32 - select C_ENVIRONMENT_BOOTBLOCK select NO_MMCONF_SUPPORT select REG_SCRIPT select PLATFORM_USES_FSP2_0 @@ -226,11 +225,6 @@ The location in CBFS that the RMU is located. It must match the strap-determined base address.
-##### -# Bootblock -# The following options support the C_ENVIRONMENT_BOOTBLOCK. -##### - config DCACHE_BSP_STACK_SIZE hex default 0x4000 diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index f5f1e30..032ded4 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -30,7 +30,6 @@ select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_INTEL_COMMON_HYPERTHREADING - select C_ENVIRONMENT_BOOTBLOCK select FSP_M_XIP select FSP_T_XIP if FSP_CAR select GENERIC_GPIO_LIB diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 2824e52..9c5fc98 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -14,7 +14,6 @@ select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES - select C_ENVIRONMENT_BOOTBLOCK select CACHE_MRC_SETTINGS select COMMON_FADT select CPU_INTEL_FIRMWARE_INTERFACE_TABLE diff --git a/src/vendorcode/eltan/security/verified_boot/Makefile.inc b/src/vendorcode/eltan/security/verified_boot/Makefile.inc index 357e520..cac4f3a 100644 --- a/src/vendorcode/eltan/security/verified_boot/Makefile.inc +++ b/src/vendorcode/eltan/security/verified_boot/Makefile.inc @@ -17,7 +17,9 @@
CPPFLAGS_common += -I$(src)/security/vboot
-bootblock-$(CONFIG_C_ENVIRONMENT_BOOTBLOCK) += vboot_check.c +ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y) +bootblock-y += vboot_check.c +endif postcar-y += vboot_check.c romstage-y += vboot_check.c ramstage-y += vboot_check.c diff --git a/src/vendorcode/eltan/security/verified_boot/vboot_check.c b/src/vendorcode/eltan/security/verified_boot/vboot_check.c index 9fb8370..bc502c9 100644 --- a/src/vendorcode/eltan/security/verified_boot/vboot_check.c +++ b/src/vendorcode/eltan/security/verified_boot/vboot_check.c @@ -276,7 +276,7 @@ { printk(BIOS_SPEW, "%s: processing early items\n", __func__);
- if (!CONFIG(C_ENVIRONMENT_BOOTBLOCK) && + if (CONFIG(ROMCC_BOOTBLOCK) && CONFIG(VENDORCODE_ELTAN_VBOOT_SIGNED_MANIFEST)) { printk(BIOS_SPEW, "%s: check the manifest\n", __func__); if (verified_boot_check_manifest() != 0)
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37154 )
Change subject: Kconfig: Flip the meaning of C_ENVIRONMENT_BOOTBLOCK ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/car/romstage.... File src/cpu/intel/car/romstage.c:
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/car/romstage.... PS1, Line 75: /* This wrapper enables easy transition away from ROMCC_BOOTBLOCK trailing whitespace
Hello Kyösti Mälkki, Patrick Rudolph, Aaron Durbin, Julius Werner, Frans Hendriks, build bot (Jenkins), Philipp Hug, Patrick Georgi, ron minnich, Vanny E, Damien Zammit, David Guckian, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37154
to look at the new patch set (#2).
Change subject: Kconfig: Flip the meaning of C_ENVIRONMENT_BOOTBLOCK ......................................................................
Kconfig: Flip the meaning of C_ENVIRONMENT_BOOTBLOCK
The romcc bootblock will be deprecated soon and most platforms use C_ENVIRONMENT_BOOTBLOCK already.
Change-Id: I773a76aade623303b7cd95ebe9b0411e5a7ecbaf Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/Kconfig M src/arch/arm/Kconfig M src/arch/arm64/Kconfig M src/arch/ppc64/Kconfig M src/arch/riscv/Kconfig M src/arch/x86/Kconfig M src/arch/x86/Makefile.inc M src/arch/x86/assembly_entry.S M src/arch/x86/bootblock_crt0.S M src/arch/x86/bootblock_romcc.S M src/arch/x86/car.ld M src/arch/x86/include/arch/cpu.h M src/arch/x86/memlayout.ld M src/console/Kconfig M src/cpu/intel/car/non-evict/cache_as_ram.S M src/cpu/intel/car/p3/cache_as_ram.S M src/cpu/intel/car/romstage.c M src/cpu/intel/microcode/Kconfig M src/cpu/intel/model_1067x/Kconfig M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_6fx/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/qemu-x86/Kconfig M src/cpu/x86/16bit/entry16.inc M src/cpu/x86/Kconfig M src/lib/Makefile.inc M src/mainboard/facebook/fbg1701/Makefile.inc M src/mainboard/portwell/m107/Makefile.inc M src/northbridge/amd/agesa/Kconfig M src/northbridge/amd/pi/Kconfig M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/i440bx/Kconfig M src/northbridge/intel/i945/Kconfig M src/northbridge/intel/nehalem/Kconfig M src/northbridge/intel/pineview/Kconfig M src/northbridge/intel/x4x/Kconfig M src/security/vboot/Kconfig M src/soc/amd/picasso/Kconfig M src/soc/amd/stoneyridge/Kconfig M src/soc/intel/apollolake/Kconfig M src/soc/intel/baytrail/Kconfig M src/soc/intel/braswell/Kconfig M src/soc/intel/broadwell/Kconfig M src/soc/intel/cannonlake/Kconfig M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/icelake/Kconfig M src/soc/intel/quark/Kconfig M src/soc/intel/skylake/Kconfig M src/soc/intel/tigerlake/Kconfig M src/vendorcode/eltan/security/verified_boot/Makefile.inc M src/vendorcode/eltan/security/verified_boot/vboot_check.c 53 files changed, 48 insertions(+), 78 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/37154/2
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37154 )
Change subject: Kconfig: Flip the meaning of C_ENVIRONMENT_BOOTBLOCK ......................................................................
Patch Set 2:
(11 comments)
Thanks. The comments marked ditto are borderline, I quess we can accept them but I feel they don't exactly fit the title 'flip the default'. Could be one preceding commit?
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/Makefile.inc File src/arch/x86/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/Makefile.inc@1... PS1, Line 131: else # !ROMCC_BOOTBLOCK without ! ?
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/assembly_entry... File src/arch/x86/assembly_entry.S:
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/assembly_entry... PS1, Line 22: * clear .bss/CAR_GLOBAL variables that are stage specific. I think you can already wipe CAR_GLOBAL here. It could have been done earlier but I overlooked it.
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/include/arch/c... File src/arch/x86/include/arch/cpu.h:
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/include/arch/c... PS1, Line 291: * When using not using a romcc bootblock the car_stage_entry() -using
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/memlayout.ld File src/arch/x86/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/memlayout.ld@5... PS1, Line 52: /* arch/x86/bootblock.ld contains the logic for the romcc bootblock linking. */ Maybe have literal ROMCC_BOOTBLOCK here so we remember to revisit this line.
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/microcode/Kco... File src/cpu/intel/microcode/Kconfig:
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/microcode/Kco... PS1, Line 4: default n if ROMCC_BOOTBLOCK This got flipped?
default y if !ROMCC_BOOTBLOCK
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/model_1067x/K... File src/cpu/intel/model_1067x/Kconfig:
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/model_1067x/K... PS1, Line 15: select SETUP_XIP_CACHE Split, not strictly about flipping and should have been done before?
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/model_6fx/Kco... File src/cpu/intel/model_6fx/Kconfig:
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/model_6fx/Kco... PS1, Line 16: select SETUP_XIP_CACHE ditto
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/socket_LGA775... File src/cpu/intel/socket_LGA775/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/socket_LGA775... PS1, Line 18: else ditto
https://review.coreboot.org/c/coreboot/+/37154/1/src/mainboard/facebook/fbg1... File src/mainboard/facebook/fbg1701/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/37154/1/src/mainboard/facebook/fbg1... PS1, Line 25: bootblock-y += com_init.c ditto
https://review.coreboot.org/c/coreboot/+/37154/1/src/mainboard/portwell/m107... File src/mainboard/portwell/m107/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/37154/1/src/mainboard/portwell/m107... PS1, Line 18: bootblock-y += com_init.c ditto
https://review.coreboot.org/c/coreboot/+/37154/1/src/vendorcode/eltan/securi... File src/vendorcode/eltan/security/verified_boot/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/37154/1/src/vendorcode/eltan/securi... PS1, Line 20: ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y) Do you need the conditional here? While built, it will not get linked.
Hello Kyösti Mälkki, Patrick Rudolph, Aaron Durbin, Julius Werner, Frans Hendriks, build bot (Jenkins), Philipp Hug, Patrick Georgi, ron minnich, Vanny E, Damien Zammit, David Guckian, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37154
to look at the new patch set (#3).
Change subject: Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol ......................................................................
Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol
The romcc bootblock will be deprecated soon and most platforms use C_ENVIRONMENT_BOOTBLOCK already. This patch drops the CONFIG_C_ENVIRONMENT_BOOTBLOCK symbol and adds CONFIG_ROMCC_BOOTBLOCK where needed.
Change-Id: I773a76aade623303b7cd95ebe9b0411e5a7ecbaf Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/Kconfig M src/arch/arm/Kconfig M src/arch/arm64/Kconfig M src/arch/ppc64/Kconfig M src/arch/riscv/Kconfig M src/arch/x86/Kconfig M src/arch/x86/Makefile.inc M src/arch/x86/assembly_entry.S M src/arch/x86/bootblock_crt0.S M src/arch/x86/bootblock_romcc.S M src/arch/x86/car.ld M src/arch/x86/include/arch/cpu.h M src/arch/x86/memlayout.ld M src/console/Kconfig M src/cpu/intel/car/non-evict/cache_as_ram.S M src/cpu/intel/car/p3/cache_as_ram.S M src/cpu/intel/car/romstage.c M src/cpu/intel/microcode/Kconfig M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/qemu-x86/Kconfig M src/cpu/x86/16bit/entry16.inc M src/cpu/x86/Kconfig M src/lib/Makefile.inc M src/northbridge/amd/agesa/Kconfig M src/northbridge/amd/pi/Kconfig M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/i440bx/Kconfig M src/northbridge/intel/i945/Kconfig M src/northbridge/intel/nehalem/Kconfig M src/northbridge/intel/pineview/Kconfig M src/northbridge/intel/x4x/Kconfig M src/security/vboot/Kconfig M src/soc/amd/picasso/Kconfig M src/soc/amd/stoneyridge/Kconfig M src/soc/intel/apollolake/Kconfig M src/soc/intel/baytrail/Kconfig M src/soc/intel/braswell/Kconfig M src/soc/intel/broadwell/Kconfig M src/soc/intel/cannonlake/Kconfig M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/icelake/Kconfig M src/soc/intel/quark/Kconfig M src/soc/intel/skylake/Kconfig M src/soc/intel/tigerlake/Kconfig M src/vendorcode/eltan/security/verified_boot/vboot_check.c 48 files changed, 41 insertions(+), 71 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/37154/3
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37154 )
Change subject: Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol ......................................................................
Patch Set 3:
(5 comments)
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/Makefile.inc File src/arch/x86/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/Makefile.inc@1... PS1, Line 131: else # !ROMCC_BOOTBLOCK
without ! ?
Done
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/assembly_entry... File src/arch/x86/assembly_entry.S:
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/assembly_entry... PS1, Line 22: * clear .bss/CAR_GLOBAL variables that are stage specific.
I think you can already wipe CAR_GLOBAL here. It could have been done earlier but I overlooked it.
Done
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/include/arch/c... File src/arch/x86/include/arch/cpu.h:
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/include/arch/c... PS1, Line 291: * When using not using a romcc bootblock the car_stage_entry()
-using
Done
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/memlayout.ld File src/arch/x86/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/37154/1/src/arch/x86/memlayout.ld@5... PS1, Line 52: /* arch/x86/bootblock.ld contains the logic for the romcc bootblock linking. */
Maybe have literal ROMCC_BOOTBLOCK here so we remember to revisit this line.
Done
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/car/romstage.... File src/cpu/intel/car/romstage.c:
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/car/romstage.... PS1, Line 75: /* This wrapper enables easy transition away from ROMCC_BOOTBLOCK
trailing whitespace
Done
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37154 )
Change subject: Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol ......................................................................
Patch Set 3:
(5 comments)
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/model_1067x/K... File src/cpu/intel/model_1067x/Kconfig:
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/model_1067x/K... PS1, Line 15: select SETUP_XIP_CACHE
Split, not strictly about flipping and should have been done before?
Done
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/model_6fx/Kco... File src/cpu/intel/model_6fx/Kconfig:
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/model_6fx/Kco... PS1, Line 16: select SETUP_XIP_CACHE
ditto
Done
https://review.coreboot.org/c/coreboot/+/37154/1/src/mainboard/facebook/fbg1... File src/mainboard/facebook/fbg1701/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/37154/1/src/mainboard/facebook/fbg1... PS1, Line 25: bootblock-y += com_init.c
ditto
Done
https://review.coreboot.org/c/coreboot/+/37154/1/src/mainboard/portwell/m107... File src/mainboard/portwell/m107/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/37154/1/src/mainboard/portwell/m107... PS1, Line 18: bootblock-y += com_init.c
ditto
Done
https://review.coreboot.org/c/coreboot/+/37154/1/src/vendorcode/eltan/securi... File src/vendorcode/eltan/security/verified_boot/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/37154/1/src/vendorcode/eltan/securi... PS1, Line 20: ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y)
Do you need the conditional here? While built, it will not get linked.
Done
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37154 )
Change subject: Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/microcode/Kco... File src/cpu/intel/microcode/Kconfig:
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/microcode/Kco... PS1, Line 4: default n if ROMCC_BOOTBLOCK
This got flipped? […]
ping
Hello Kyösti Mälkki, Patrick Rudolph, Aaron Durbin, Julius Werner, Frans Hendriks, build bot (Jenkins), Philipp Hug, Patrick Georgi, ron minnich, Vanny E, Damien Zammit, David Guckian, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37154
to look at the new patch set (#5).
Change subject: Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol ......................................................................
Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol
The romcc bootblock will be deprecated soon and most platforms use C_ENVIRONMENT_BOOTBLOCK already. This patch drops the CONFIG_C_ENVIRONMENT_BOOTBLOCK symbol and adds CONFIG_ROMCC_BOOTBLOCK where needed.
Change-Id: I773a76aade623303b7cd95ebe9b0411e5a7ecbaf Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/Kconfig M src/arch/arm/Kconfig M src/arch/arm64/Kconfig M src/arch/ppc64/Kconfig M src/arch/riscv/Kconfig M src/arch/x86/Kconfig M src/arch/x86/Makefile.inc M src/arch/x86/assembly_entry.S M src/arch/x86/bootblock_crt0.S M src/arch/x86/bootblock_romcc.S M src/arch/x86/car.ld M src/arch/x86/include/arch/cpu.h M src/arch/x86/memlayout.ld M src/console/Kconfig M src/cpu/intel/car/non-evict/cache_as_ram.S M src/cpu/intel/car/p3/cache_as_ram.S M src/cpu/intel/car/romstage.c M src/cpu/intel/microcode/Kconfig M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/qemu-x86/Kconfig M src/cpu/x86/16bit/entry16.inc M src/cpu/x86/Kconfig M src/lib/Makefile.inc M src/northbridge/amd/agesa/Kconfig M src/northbridge/amd/pi/Kconfig M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/i440bx/Kconfig M src/northbridge/intel/i945/Kconfig M src/northbridge/intel/nehalem/Kconfig M src/northbridge/intel/pineview/Kconfig M src/northbridge/intel/x4x/Kconfig M src/security/vboot/Kconfig M src/soc/amd/picasso/Kconfig M src/soc/amd/stoneyridge/Kconfig M src/soc/intel/apollolake/Kconfig M src/soc/intel/baytrail/Kconfig M src/soc/intel/braswell/Kconfig M src/soc/intel/broadwell/Kconfig M src/soc/intel/cannonlake/Kconfig M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/icelake/Kconfig M src/soc/intel/quark/Kconfig M src/soc/intel/skylake/Kconfig M src/soc/intel/tigerlake/Kconfig M src/vendorcode/eltan/security/verified_boot/vboot_check.c 47 files changed, 41 insertions(+), 70 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/37154/5
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37154 )
Change subject: Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol ......................................................................
Patch Set 5: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/microcode/Kco... File src/cpu/intel/microcode/Kconfig:
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/microcode/Kco... PS1, Line 4: default n if ROMCC_BOOTBLOCK
ping
Done
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37154 )
Change subject: Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/socket_LGA775... File src/cpu/intel/socket_LGA775/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/37154/1/src/cpu/intel/socket_LGA775... PS1, Line 18: else
ditto
Done
Hello Kyösti Mälkki, Patrick Rudolph, Aaron Durbin, Julius Werner, Frans Hendriks, build bot (Jenkins), Philipp Hug, Patrick Georgi, ron minnich, Vanny E, Damien Zammit, David Guckian, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37154
to look at the new patch set (#6).
Change subject: Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol ......................................................................
Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol
The romcc bootblock will be deprecated soon and most platforms use C_ENVIRONMENT_BOOTBLOCK already. This patch drops the CONFIG_C_ENVIRONMENT_BOOTBLOCK symbol and adds CONFIG_ROMCC_BOOTBLOCK where needed.
Change-Id: I773a76aade623303b7cd95ebe9b0411e5a7ecbaf Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/Kconfig M src/arch/arm/Kconfig M src/arch/arm64/Kconfig M src/arch/ppc64/Kconfig M src/arch/riscv/Kconfig M src/arch/x86/Kconfig M src/arch/x86/Makefile.inc M src/arch/x86/assembly_entry.S M src/arch/x86/bootblock_crt0.S M src/arch/x86/bootblock_romcc.S M src/arch/x86/car.ld M src/arch/x86/include/arch/cpu.h M src/arch/x86/memlayout.ld M src/console/Kconfig M src/cpu/intel/car/non-evict/cache_as_ram.S M src/cpu/intel/car/p3/cache_as_ram.S M src/cpu/intel/car/romstage.c M src/cpu/intel/microcode/Kconfig M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/qemu-x86/Kconfig M src/cpu/x86/16bit/entry16.inc M src/cpu/x86/Kconfig M src/lib/Makefile.inc M src/northbridge/amd/agesa/Kconfig M src/northbridge/amd/pi/Kconfig M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/i945/Kconfig M src/northbridge/intel/nehalem/Kconfig M src/northbridge/intel/pineview/Kconfig M src/northbridge/intel/x4x/Kconfig M src/security/vboot/Kconfig M src/soc/amd/picasso/Kconfig M src/soc/amd/stoneyridge/Kconfig M src/soc/intel/apollolake/Kconfig M src/soc/intel/baytrail/Kconfig M src/soc/intel/braswell/Kconfig M src/soc/intel/broadwell/Kconfig M src/soc/intel/cannonlake/Kconfig M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/icelake/Kconfig M src/soc/intel/quark/Kconfig M src/soc/intel/skylake/Kconfig M src/soc/intel/tigerlake/Kconfig M src/vendorcode/eltan/security/verified_boot/vboot_check.c 47 files changed, 41 insertions(+), 70 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/37154/6
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37154 )
Change subject: Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol ......................................................................
Patch Set 6: Code-Review+1
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37154 )
Change subject: Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol ......................................................................
Patch Set 6: Code-Review+1
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37154 )
Change subject: Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol ......................................................................
Patch Set 6: Code-Review+2
Can we expedite the review and merge? Due the amount of files touched here this goes stale fast and enters unnecessary rebase iteration loop.
Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37154 )
Change subject: Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol ......................................................................
Patch Set 6: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37154 )
Change subject: Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol ......................................................................
Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol
The romcc bootblock will be deprecated soon and most platforms use C_ENVIRONMENT_BOOTBLOCK already. This patch drops the CONFIG_C_ENVIRONMENT_BOOTBLOCK symbol and adds CONFIG_ROMCC_BOOTBLOCK where needed.
Change-Id: I773a76aade623303b7cd95ebe9b0411e5a7ecbaf Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/37154 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: HAOUAS Elyes ehaouas@noos.fr Reviewed-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-by: Michał Żygowski michal.zygowski@3mdeb.com --- M src/Kconfig M src/arch/arm/Kconfig M src/arch/arm64/Kconfig M src/arch/ppc64/Kconfig M src/arch/riscv/Kconfig M src/arch/x86/Kconfig M src/arch/x86/Makefile.inc M src/arch/x86/assembly_entry.S M src/arch/x86/bootblock_crt0.S M src/arch/x86/bootblock_romcc.S M src/arch/x86/car.ld M src/arch/x86/include/arch/cpu.h M src/arch/x86/memlayout.ld M src/console/Kconfig M src/cpu/intel/car/non-evict/cache_as_ram.S M src/cpu/intel/car/p3/cache_as_ram.S M src/cpu/intel/car/romstage.c M src/cpu/intel/microcode/Kconfig M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/qemu-x86/Kconfig M src/cpu/x86/16bit/entry16.inc M src/cpu/x86/Kconfig M src/lib/Makefile.inc M src/northbridge/amd/agesa/Kconfig M src/northbridge/amd/pi/Kconfig M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/i945/Kconfig M src/northbridge/intel/nehalem/Kconfig M src/northbridge/intel/pineview/Kconfig M src/northbridge/intel/x4x/Kconfig M src/security/vboot/Kconfig M src/soc/amd/picasso/Kconfig M src/soc/amd/stoneyridge/Kconfig M src/soc/intel/apollolake/Kconfig M src/soc/intel/baytrail/Kconfig M src/soc/intel/braswell/Kconfig M src/soc/intel/broadwell/Kconfig M src/soc/intel/cannonlake/Kconfig M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/icelake/Kconfig M src/soc/intel/quark/Kconfig M src/soc/intel/skylake/Kconfig M src/soc/intel/tigerlake/Kconfig M src/vendorcode/eltan/security/verified_boot/vboot_check.c 47 files changed, 41 insertions(+), 70 deletions(-)
Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved HAOUAS Elyes: Looks good to me, but someone else must approve Michał Żygowski: Looks good to me, approved
diff --git a/src/Kconfig b/src/Kconfig index 8df5323..2e06299 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -1177,9 +1177,7 @@ # src/lib/bootblock.c#main() C entry point. bool
-config C_ENVIRONMENT_BOOTBLOCK - # To be selected by arch or platform if a C environment is available during the - # bootblock. Normally this signifies availability of RW memory (e.g. SRAM). +config ROMCC_BOOTBLOCK bool
############################################################################### diff --git a/src/arch/arm/Kconfig b/src/arch/arm/Kconfig index 1eed2de..ed838a5 100644 --- a/src/arch/arm/Kconfig +++ b/src/arch/arm/Kconfig @@ -4,7 +4,6 @@ config ARCH_BOOTBLOCK_ARM bool select ARCH_ARM - select C_ENVIRONMENT_BOOTBLOCK
config ARCH_VERSTAGE_ARM bool diff --git a/src/arch/arm64/Kconfig b/src/arch/arm64/Kconfig index 96a23dc..588e8ce 100644 --- a/src/arch/arm64/Kconfig +++ b/src/arch/arm64/Kconfig @@ -4,7 +4,6 @@ config ARCH_BOOTBLOCK_ARM64 bool select ARCH_ARM64 - select C_ENVIRONMENT_BOOTBLOCK
config ARCH_VERSTAGE_ARM64 bool diff --git a/src/arch/ppc64/Kconfig b/src/arch/ppc64/Kconfig index 0699e91..44dbb1d 100644 --- a/src/arch/ppc64/Kconfig +++ b/src/arch/ppc64/Kconfig @@ -5,7 +5,6 @@ bool select ARCH_PPC64 select BOOTBLOCK_CUSTOM - select C_ENVIRONMENT_BOOTBLOCK
config ARCH_VERSTAGE_PPC64 bool diff --git a/src/arch/riscv/Kconfig b/src/arch/riscv/Kconfig index f2ca571..8369afe 100644 --- a/src/arch/riscv/Kconfig +++ b/src/arch/riscv/Kconfig @@ -77,7 +77,6 @@ config ARCH_BOOTBLOCK_RISCV bool default n - select C_ENVIRONMENT_BOOTBLOCK
config ARCH_VERSTAGE_RISCV bool diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 24a2065..a788bc0 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -23,7 +23,7 @@ bool default n select ARCH_X86 - select BOOTBLOCK_CUSTOM if !C_ENVIRONMENT_BOOTBLOCK + select BOOTBLOCK_CUSTOM if ROMCC_BOOTBLOCK
config ARCH_VERSTAGE_X86_32 bool @@ -47,7 +47,7 @@ bool default n select ARCH_X86 - select BOOTBLOCK_CUSTOM if !C_ENVIRONMENT_BOOTBLOCK + select BOOTBLOCK_CUSTOM if ROMCC_BOOTBLOCK
config ARCH_VERSTAGE_X86_64 bool @@ -199,7 +199,7 @@ hex default 0x80
-# 64KiB default bootblock size when employing C_ENVIRONMENT_BOOTBLOCK. +# 64KiB default bootblock size config C_ENV_BOOTBLOCK_SIZE hex default 0x10000 @@ -239,7 +239,7 @@ choice prompt "Bootblock behaviour" default BOOTBLOCK_SIMPLE - depends on !C_ENVIRONMENT_BOOTBLOCK + depends on ROMCC_BOOTBLOCK
config BOOTBLOCK_SIMPLE bool "Always load fallback" diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 6f47e88..423c351 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -116,7 +116,7 @@ bootblock-y += id.S $(call src-to-obj,bootblock,$(dir)/id.S): $(obj)/build.h
-ifeq ($(CONFIG_C_ENVIRONMENT_BOOTBLOCK),y) +ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y)
bootblock-y += bootblock_crt0.S
@@ -128,7 +128,7 @@
bootblock-$(CONFIG_ARCH_BOOTBLOCK_X86_32) += walkcbfs.S
-else # !C_ENVIRONMENT_BOOTBLOCK +else # ROMCC_BOOTBLOCK
# x86-specific linker flags ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32),y) @@ -178,7 +178,7 @@ $(filter-out %.ld,$(bootblock-objs)) \ -T $(call src-to-obj,bootblock,src/arch/x86/bootblock.ld)
-endif # C_ENVIRONMENT_BOOTBLOCK +endif # ROMCC_BOOTBLOCK
endif # CONFIG_ARCH_BOOTBLOCK_X86_32 / CONFIG_ARCH_BOOTBLOCK_X86_64 @@ -223,7 +223,9 @@ romstage-$(CONFIG_HAVE_ACPI_RESUME) += acpi_s3.c # gdt_init.S is included by entry32.inc when romstage is the first C # environment. -romstage-$(CONFIG_C_ENVIRONMENT_BOOTBLOCK) += gdt_init.S +ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y) +romstage-y += gdt_init.S +endif romstage-y += cbmem.c romstage-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c romstage-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S diff --git a/src/arch/x86/assembly_entry.S b/src/arch/x86/assembly_entry.S index d9d6d4e..9d6f5a4 100644 --- a/src/arch/x86/assembly_entry.S +++ b/src/arch/x86/assembly_entry.S @@ -13,14 +13,13 @@
#include <rules.h>
-#if CONFIG(C_ENVIRONMENT_BOOTBLOCK) +#if !CONFIG(ROMCC_BOOTBLOCK)
/* - * This path is for stages that are post bootblock when employing - * CONFIG_C_ENVIRONMENT_BOOTBLOCK. The gdt is reloaded to accommodate - * platforms that are executing out of CAR. In order to continue with - * C code execution one needs to set stack pointer and clear CAR_GLOBAL - * variables that are stage specific. + * This path is for stages that are post bootblock. The gdt is reloaded + * to accommodate platforms that are executing out of CAR. In order to + * continue with C code execution one needs to set stack pointer and + * clear .bss variables that are stage specific. */ .section ".text._start", "ax", @progbits .global _start diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S index 9fcb5c4..3256731 100644 --- a/src/arch/x86/bootblock_crt0.S +++ b/src/arch/x86/bootblock_crt0.S @@ -11,8 +11,7 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * This is the modern bootblock. It is used by platforms which select - * C_ENVIRONMENT_BOOTBLOCK, and it prepares the system for C environment runtime + * This is the modern bootblock. It prepares the system for C environment runtime * setup. The actual setup is done by hardware-specific code. * * It provides a bootflow similar to other architectures, and thus is considered diff --git a/src/arch/x86/bootblock_romcc.S b/src/arch/x86/bootblock_romcc.S index 05b34c6..7d6f42f 100644 --- a/src/arch/x86/bootblock_romcc.S +++ b/src/arch/x86/bootblock_romcc.S @@ -20,7 +20,7 @@ * - timestamp.inc: store TSC in MMX registers * - generated/bootblock.inc: ROMCC part of the bootblock * - * This is used on platforms which do not select C_ENVIRONMENT_BOOTBLOCK, and it + * This is used on platforms which select ROMCC_BOOTBLOCK, and it * tries to do the absolute minimum before walking CBFS and jumping to romstage. * * This file assembles the bootblock program by the order of the includes. Thus, diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld index 3680250..483a908 100644 --- a/src/arch/x86/car.ld +++ b/src/arch/x86/car.ld @@ -36,7 +36,7 @@ /* Stack for CAR stages. Since it persists across all stages that * use CAR it can be reused. The chipset/SoC is expected to provide * the stack size. */ -#if CONFIG(C_ENVIRONMENT_BOOTBLOCK) +#if !CONFIG(ROMCC_BOOTBLOCK) _car_stack = .; . += CONFIG_DCACHE_BSP_STACK_SIZE; _ecar_stack = .; @@ -90,7 +90,7 @@ _ebss = .; _car_unallocated_start = .;
-#if !CONFIG(C_ENVIRONMENT_BOOTBLOCK) +#if CONFIG(ROMCC_BOOTBLOCK) _car_stack = .; _ecar_stack = _car_region_end; #endif @@ -121,6 +121,6 @@ #if CONFIG(PAGING_IN_CACHE_AS_RAM) _bogus2 = ASSERT(_pagetables == ALIGN(_pagetables, 4096), "_pagetables aren't 4KiB aligned"); #endif -#if CONFIG(C_ENVIRONMENT_BOOTBLOCK) +#if !CONFIG(ROMCC_BOOTBLOCK) _bogus3 = ASSERT(CONFIG_DCACHE_BSP_STACK_SIZE > 0x0, "BSP stack size not configured"); #endif diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index e0e3ca1..50d636b 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -288,9 +288,8 @@ #define asmlinkage __attribute__((regparm(0)))
/* - * When using CONFIG_C_ENVIRONMENT_BOOTBLOCK the car_stage_entry() - * is the symbol jumped to for each stage after bootblock using - * cache-as-ram. + * When not using a romcc bootblock the car_stage_entry() is the symbol + * jumped to for each stage after bootblock using cache-as-ram. */ asmlinkage void car_stage_entry(void);
diff --git a/src/arch/x86/memlayout.ld b/src/arch/x86/memlayout.ld index 9fd9889..f8ae9f3 100644 --- a/src/arch/x86/memlayout.ld +++ b/src/arch/x86/memlayout.ld @@ -49,8 +49,7 @@
#include EARLY_MEMLAYOUT #elif ENV_BOOTBLOCK - /* This is for C_ENVIRONMENT_BOOTBLOCK. arch/x86/bootblock.ld contains - * the logic for the romcc linking. */ + /* arch/x86/bootblock.ld contains the logic for the ROMCC_BOOTBLOCK linking. */ BOOTBLOCK(0xffffffff - CONFIG_C_ENV_BOOTBLOCK_SIZE + 1, CONFIG_C_ENV_BOOTBLOCK_SIZE)
diff --git a/src/console/Kconfig b/src/console/Kconfig index b90823e..9151a32 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -5,7 +5,7 @@
config BOOTBLOCK_CONSOLE bool "Enable early (bootblock) console output." - depends on C_ENVIRONMENT_BOOTBLOCK && !NO_BOOTBLOCK_CONSOLE + depends on !ROMCC_BOOTBLOCK && !NO_BOOTBLOCK_CONSOLE default y help Use console during the bootblock if supported diff --git a/src/cpu/intel/car/non-evict/cache_as_ram.S b/src/cpu/intel/car/non-evict/cache_as_ram.S index cd69720..5a668c4 100644 --- a/src/cpu/intel/car/non-evict/cache_as_ram.S +++ b/src/cpu/intel/car/non-evict/cache_as_ram.S @@ -29,7 +29,7 @@
bootblock_pre_c_entry:
-#if CONFIG(C_ENVIRONMENT_BOOTBLOCK) +#if !CONFIG(ROMCC_BOOTBLOCK) movl $cache_as_ram, %esp /* return address */ jmp check_mtrr /* Check if CPU properly reset */ #endif diff --git a/src/cpu/intel/car/p3/cache_as_ram.S b/src/cpu/intel/car/p3/cache_as_ram.S index a3487db..23df701 100644 --- a/src/cpu/intel/car/p3/cache_as_ram.S +++ b/src/cpu/intel/car/p3/cache_as_ram.S @@ -18,7 +18,7 @@ #define CACHE_AS_RAM_SIZE CONFIG_DCACHE_RAM_SIZE #define CACHE_AS_RAM_BASE CONFIG_DCACHE_RAM_BASE
-#if CONFIG(C_ENVIRONMENT_BOOTBLOCK) +#if !CONFIG(ROMCC_BOOTBLOCK) #if ((CONFIG_C_ENV_BOOTBLOCK_SIZE & (CONFIG_C_ENV_BOOTBLOCK_SIZE - 1)) != 0) #error "CONFIG_C_ENV_BOOTBLOCK_SIZE must be a power of 2!" #endif diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c index 9d19635..1f8eb9a 100644 --- a/src/cpu/intel/car/romstage.c +++ b/src/cpu/intel/car/romstage.c @@ -71,8 +71,8 @@ /* We do not return here. */ }
-#if !CONFIG(C_ENVIRONMENT_BOOTBLOCK) -/* This wrapper enables easy transition towards C_ENVIRONMENT_BOOTBLOCK, +#if CONFIG(ROMCC_BOOTBLOCK) +/* This wrapper enables easy transition away from ROMCC_BOOTBLOCK * keeping changes in cache_as_ram.S easy to manage. */ asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist) diff --git a/src/cpu/intel/microcode/Kconfig b/src/cpu/intel/microcode/Kconfig index b783892..73afe0b 100644 --- a/src/cpu/intel/microcode/Kconfig +++ b/src/cpu/intel/microcode/Kconfig @@ -1,7 +1,7 @@ config MICROCODE_UPDATE_PRE_RAM bool depends on SUPPORT_CPU_UCODE_IN_CBFS - default y if C_ENVIRONMENT_BOOTBLOCK + default y if !ROMCC_BOOTBLOCK help Select this option if you want to update the microcode during the cache as ram setup. diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index f316329..e312605 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -21,7 +21,6 @@ select CPU_INTEL_COMMON_TIMEBASE select PARALLEL_MP select NO_FIXED_XIP_ROM_SIZE - select C_ENVIRONMENT_BOOTBLOCK
config SMM_TSEG_SIZE hex diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index 10001bd..00af79a 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -27,6 +27,7 @@ select UDELAY_TSC select TSC_MONOTONIC_TIMER select UNKNOWN_TSC_RATE + select ROMCC_BOOTBLOCK
config DCACHE_RAM_BASE hex diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index a2ebeb2..176ae9e 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -11,7 +11,6 @@ select UDELAY_TSC select TSC_MONOTONIC_TIMER select SIPI_VECTOR_IN_ROM - select C_ENVIRONMENT_BOOTBLOCK select CPU_INTEL_COMMON select CPU_INTEL_COMMON_TIMEBASE
diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index 7504233..e6025b5 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -21,5 +21,4 @@ select UDELAY_TSC select TSC_MONOTONIC_TIMER select UNKNOWN_TSC_RATE - select C_ENVIRONMENT_BOOTBLOCK select SMM_ASEG diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc index 9e00c55..e0babd5 100644 --- a/src/cpu/x86/16bit/entry16.inc +++ b/src/cpu/x86/16bit/entry16.inc @@ -29,7 +29,7 @@
#include <arch/rom_segs.h>
-#if CONFIG(C_ENVIRONMENT_BOOTBLOCK) || \ +#if !CONFIG(ROMCC_BOOTBLOCK) || \ CONFIG(SIPI_VECTOR_IN_ROM) /* Symbol _start16bit must be aligned to 4kB to start AP CPUs with * Startup IPI message without RAM. diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 85ebd83..efb5fa9 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -77,7 +77,7 @@
config SETUP_XIP_CACHE bool - depends on C_ENVIRONMENT_BOOTBLOCK + depends on !ROMCC_BOOTBLOCK depends on !NO_XIP_EARLY_STAGES help Select this option to set up an MTRR to cache XIP stages loaded diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index dc0c46d..b444ea3 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -268,7 +268,9 @@ postcar-$(CONFIG_GENERIC_UDELAY) += timer.c
# Use program.ld for all the platforms which use C fo the bootblock. -bootblock-$(CONFIG_C_ENVIRONMENT_BOOTBLOCK) += program.ld +ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y) +bootblock-y += program.ld +endif
decompressor-y += program.ld postcar-y += program.ld diff --git a/src/northbridge/amd/agesa/Kconfig b/src/northbridge/amd/agesa/Kconfig index e1e129a..50dba25 100644 --- a/src/northbridge/amd/agesa/Kconfig +++ b/src/northbridge/amd/agesa/Kconfig @@ -17,6 +17,7 @@ bool default CPU_AMD_AGESA select CBMEM_TOP_BACKUP + select ROMCC_BOOTBLOCK
if NORTHBRIDGE_AMD_AGESA
diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig index c0df2a1..4fbcd4a 100644 --- a/src/northbridge/amd/pi/Kconfig +++ b/src/northbridge/amd/pi/Kconfig @@ -18,6 +18,7 @@ default y if CPU_AMD_PI default n select CBMEM_TOP_BACKUP + select ROMCC_BOOTBLOCK
if NORTHBRIDGE_AMD_PI
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig index 4877fa9..69b055e 100644 --- a/src/northbridge/intel/gm45/Kconfig +++ b/src/northbridge/intel/gm45/Kconfig @@ -26,7 +26,6 @@ select INTEL_GMA_ACPI select INTEL_GMA_SSC_ALTERNATE_REF select PARALLEL_MP - select C_ENVIRONMENT_BOOTBLOCK
config VBOOT select VBOOT_STARTS_IN_BOOTBLOCK diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig index aad2674..6dc4ef0 100644 --- a/src/northbridge/intel/haswell/Kconfig +++ b/src/northbridge/intel/haswell/Kconfig @@ -19,7 +19,6 @@ select CACHE_MRC_SETTINGS select INTEL_DDI select INTEL_GMA_ACPI - select C_ENVIRONMENT_BOOTBLOCK select BOOTBLOCK_CONSOLE
if NORTHBRIDGE_INTEL_HASWELL diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig index a0550ec..c22275a 100644 --- a/src/northbridge/intel/i945/Kconfig +++ b/src/northbridge/intel/i945/Kconfig @@ -27,7 +27,6 @@ select INTEL_EDID select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT select PARALLEL_MP - select C_ENVIRONMENT_BOOTBLOCK
config NORTHBRIDGE_INTEL_SUBTYPE_I945GC def_bool n diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig index 7b56841..a119b81 100644 --- a/src/northbridge/intel/nehalem/Kconfig +++ b/src/northbridge/intel/nehalem/Kconfig @@ -21,7 +21,6 @@ select INTEL_GMA_ACPI select CACHE_MRC_SETTINGS select HAVE_DEBUG_RAM_SETUP - select C_ENVIRONMENT_BOOTBLOCK
if NORTHBRIDGE_INTEL_NEHALEM
diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig index edf4f23..7306036 100644 --- a/src/northbridge/intel/pineview/Kconfig +++ b/src/northbridge/intel/pineview/Kconfig @@ -28,7 +28,6 @@ select INTEL_EDID if MAINBOARD_DO_NATIVE_VGA_INIT select INTEL_GMA_ACPI select PARALLEL_MP - select C_ENVIRONMENT_BOOTBLOCK
config VGA_BIOS_ID string diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig index 2a54e24..247686a 100644 --- a/src/northbridge/intel/x4x/Kconfig +++ b/src/northbridge/intel/x4x/Kconfig @@ -26,7 +26,6 @@ select INTEL_GMA_ACPI select CACHE_MRC_SETTINGS select PARALLEL_MP - select C_ENVIRONMENT_BOOTBLOCK
config CBFS_SIZE hex diff --git a/src/security/vboot/Kconfig b/src/security/vboot/Kconfig index df1b7e4..a829443 100644 --- a/src/security/vboot/Kconfig +++ b/src/security/vboot/Kconfig @@ -95,7 +95,7 @@ config VBOOT_STARTS_IN_BOOTBLOCK bool default n - depends on C_ENVIRONMENT_BOOTBLOCK + depends on !ROMCC_BOOTBLOCK help Firmware verification happens during the end of or right after the bootblock. This implies that a static VBOOT2_WORK() buffer must be diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 5f9792b..e192818 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -49,7 +49,6 @@ select SOC_AMD_COMMON_BLOCK_HDA select SOC_AMD_COMMON_BLOCK_SATA select SOC_AMD_COMMON_BLOCK_S3 - select C_ENVIRONMENT_BOOTBLOCK select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select PARALLEL_MP @@ -82,7 +81,6 @@ default 0x10000
config DCACHE_BSP_STACK_SIZE - depends on C_ENVIRONMENT_BOOTBLOCK hex default 0x4000 help diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 0d6f2ff..cbf88df 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -69,7 +69,6 @@ select SOC_AMD_COMMON_BLOCK_PSP select SOC_AMD_COMMON_BLOCK_CAR select SOC_AMD_COMMON_BLOCK_S3 - select C_ENVIRONMENT_BOOTBLOCK select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select PARALLEL_MP @@ -98,7 +97,6 @@ default 0x10000
config DCACHE_BSP_STACK_SIZE - depends on C_ENVIRONMENT_BOOTBLOCK hex default 0x4000 help diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 026f6da..0b3b30a 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -38,7 +38,6 @@ select ACPI_NHLT select SOC_INTEL_COMMON_NHLT # Misc options - select C_ENVIRONMENT_BOOTBLOCK select CACHE_MRC_SETTINGS select COMMON_FADT select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 397e867..fac14cb 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -37,6 +37,7 @@ select INTEL_GMA_SWSMISCI select CPU_INTEL_COMMON select CPU_HAS_L2_ENABLE_MSR + select ROMCC_BOOTBLOCK
config VBOOT select VBOOT_MUST_REQUEST_DISPLAY diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 7ea0186..f08b589 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -46,7 +46,6 @@ select INTEL_GMA_SWSMISCI select CPU_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS - select C_ENVIRONMENT_BOOTBLOCK
config DCACHE_BSP_STACK_SIZE hex diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 095ed98..07bcf22 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -41,7 +41,6 @@ select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE select NO_FIXED_XIP_ROM_SIZE - select C_ENVIRONMENT_BOOTBLOCK
config PCIEXP_ASPM bool diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 5731cff..5c91ac1 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -58,7 +58,6 @@ select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES - select C_ENVIRONMENT_BOOTBLOCK select CACHE_MRC_SETTINGS select COMMON_FADT select CPU_INTEL_COMMON diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index cb3713d..0ce0d5b 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -32,7 +32,6 @@ select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET select PLATFORM_USES_FSP2_0 - select C_ENVIRONMENT_BOOTBLOCK select IOAPIC select HAVE_SMI_HANDLER select CACHE_MRC_SETTINGS diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index a2fe5ed..7f1cd89 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -14,7 +14,6 @@ select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES - select C_ENVIRONMENT_BOOTBLOCK select CACHE_MRC_SETTINGS select COMMON_FADT select CPU_INTEL_FIRMWARE_INTERFACE_TABLE diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index 461d230..099c7dd 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -26,7 +26,6 @@ select ARCH_RAMSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_VERSTAGE_X86_32 - select C_ENVIRONMENT_BOOTBLOCK select NO_MMCONF_SUPPORT select REG_SCRIPT select PLATFORM_USES_FSP2_0 @@ -226,11 +225,6 @@ The location in CBFS that the RMU is located. It must match the strap-determined base address.
-##### -# Bootblock -# The following options support the C_ENVIRONMENT_BOOTBLOCK. -##### - config DCACHE_BSP_STACK_SIZE hex default 0x4000 diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index f5f1e30..032ded4 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -30,7 +30,6 @@ select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_INTEL_COMMON_HYPERTHREADING - select C_ENVIRONMENT_BOOTBLOCK select FSP_M_XIP select FSP_T_XIP if FSP_CAR select GENERIC_GPIO_LIB diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 2824e52..9c5fc98 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -14,7 +14,6 @@ select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES - select C_ENVIRONMENT_BOOTBLOCK select CACHE_MRC_SETTINGS select COMMON_FADT select CPU_INTEL_FIRMWARE_INTERFACE_TABLE diff --git a/src/vendorcode/eltan/security/verified_boot/vboot_check.c b/src/vendorcode/eltan/security/verified_boot/vboot_check.c index 9fb8370..bc502c9 100644 --- a/src/vendorcode/eltan/security/verified_boot/vboot_check.c +++ b/src/vendorcode/eltan/security/verified_boot/vboot_check.c @@ -276,7 +276,7 @@ { printk(BIOS_SPEW, "%s: processing early items\n", __func__);
- if (!CONFIG(C_ENVIRONMENT_BOOTBLOCK) && + if (CONFIG(ROMCC_BOOTBLOCK) && CONFIG(VENDORCODE_ELTAN_VBOOT_SIGNED_MANIFEST)) { printk(BIOS_SPEW, "%s: check the manifest\n", __func__); if (verified_boot_check_manifest() != 0)
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