Change subject: soc/intel/common/block/fast_spi: Add SPI BIOS decode lock
......................................................................
PS10:
This also needs to be set in the corresponding DMI register. Take a look at how this was done for LPCIOE/LPCIOD CB:49592
--
To view, visit
https://review.coreboot.org/c/coreboot/+/71953
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I3366817b42a5878f16575698ebc546fa7852e285
Gerrit-Change-Number: 71953
Gerrit-PatchSet: 10
Gerrit-Owner: Simon Chou
simonchou@supermicro.com.tw
Gerrit-Reviewer: Angel Pons
th3fanbus@gmail.com
Gerrit-Reviewer: David Hendricks
david.hendricks@gmail.com
Gerrit-Reviewer: Felix Held
felix-coreboot@felixheld.de
Gerrit-Reviewer: Jian-Ming Wang
jianmingW@supermicro.com
Gerrit-Reviewer: Jonathan Zhang
jon.zhixiong.zhang@gmail.com
Gerrit-Reviewer: Ryback Hung
ryback.hung@quantatw.com
Gerrit-Reviewer: Shuming Chu (Shuming)
s1218944@gmail.com
Gerrit-Reviewer: Tim Chu
Tim.Chu@quantatw.com
Gerrit-Reviewer: TimLiu-SMCI
timliu@supermicro.com.tw
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Michael Niewöhner
foss@mniewoehner.de
Gerrit-CC: Paul Menzel
paulepanter@mailbox.org
Gerrit-Comment-Date: Fri, 07 Apr 2023 16:20:37 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment