Change in coreboot[master]: soc/intel/common: Implement ACPI CPPCv3 package to support hybrid core

[Sridhar Siricilla (Code Review)]

Attention is currently required from: Arthur Heymans, Nico Huber, Tim Wawrzynczak, Paul Menzel, Ravindra, Subrata Banik, Michael Niewöhner, Patrick Rudolph.
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59359 )

Change subject: soc/intel/common: Implement ACPI CPPCv3 package to support hybrid core
......................................................................

Patch Set 10:

(1 comment)

File src/soc/intel/common/block/acpi/cpu_hybrid.c:

https://review.coreboot.org/c/coreboot/+/59359/comment/6dbbf455_9826e00a 
PS3, Line 102: 	acpi_get_cpu_hybrid_info(&cpu_hybrid_info);
             : 	acpigen_write_method(XPPC_PACKAGE_NAME, 1);
             : 
             : 	if (cpu_is_nominal_freq_supported()) {
             : 
             : 		/*
             : 		 * If Nominal Frequency is supported, update Nominal Frequency and set core's
             : 		 * Nominal Performance to a scaling factor which depends on core type(big or
             : 		 * small).
             : 		 */
             : 		acpigen_set_package_element_int(CPPC_PACKAGE_NAME, 22,
             : 				cpu_hybrid_info.nominal_freq);
             : 
             : 		/* LOCAL2_OP = (CORE >> core_id) & 1 */
             : 		acpigen_emit_byte(SHIFT_RIGHT_OP);
             : 		acpigen_write_integer(cpu_hybrid_info.type_mask);
             : 		acpigen_emit_byte(ARG0_OP);
             : 		acpigen_emit_byte(LOCAL1_OP);
             : 		acpigen_write_and(LOCAL1_OP, ONE_OP, LOCAL2_OP);
             : 
             : 		/*
             : 		 * If core id is big Core, then set big core's scaling factor
             : 		 * to core's nominal frequency otherwise set small core's scaling factor.
             : 		 */
             : 		acpigen_write_if_lequal_op_int(LOCAL2_OP, 1);
             : 		acpigen_set_package_element_int(CPPC_PACKAGE_NAME, 3,
             : 				cpu_hybrid_info.big_core_nom_perf);
             : 		acpigen_write_else();
             : 		acpigen_set_package_element_int(CPPC_PACKAGE_NAME, 3,
             : 				cpu_hybrid_info.small_core_nom_perf);
             : 		acpigen_pop_len();
             : 	}
             : 
             : 	acpigen_emit_byte(RETURN_OP);
             : 	acpigen_emit_namestring(CPPC_PACKAGE_NAME);
             : 	acpigen_pop_len();
> > Implementing CPPCv3 package generation in the SSDT gives more flexibility. […]
>
> I don't see the code doing that.

At the time of writing the code, ADL-N code was not exposed externally. I will add the code to enable it for ADL-N later.