Bryant Ou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40481 )
Change subject: mb/ocp/tiogapass: Implement port 80h direct to GPIO and init UART pins ......................................................................
Patch Set 2:
(5 comments)
Patch Set 1:
(6 comments)
I've updated.
https://review.coreboot.org/c/coreboot/+/40481/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40481/1//COMMIT_MSG@9 PS1, Line 9: Enable aspeed's function that port 80h direct to GPIO for LED display,
Please mention the datasheet and section.
Done
https://review.coreboot.org/c/coreboot/+/40481/1//COMMIT_MSG@10 PS1, Line 10: also configure GPIO to UART for output serial console messages.
Please use two commits next time.
Done
https://review.coreboot.org/c/coreboot/+/40481/1//COMMIT_MSG@13 PS1, Line 13: relative
related?
Done
https://review.coreboot.org/c/coreboot/+/40481/1/src/mainboard/ocp/tiogapass... File src/mainboard/ocp/tiogapass/bootblock.c:
https://review.coreboot.org/c/coreboot/+/40481/1/src/mainboard/ocp/tiogapass... PS1, Line 56:
Unrelated. Please remove.
Done
https://review.coreboot.org/c/coreboot/+/40481/1/src/mainboard/ocp/tiogapass... PS1, Line 69: /* Enable UART function pin*/
Please add a space before `*/`.
Done