Change in coreboot[master]: soc/intel/cannonlake: Allow setting PCIe subsystem IDs after FSP Sili...

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49104 )

Change subject: soc/intel/cannonlake: Allow setting PCIe subsystem IDs after FSP SiliconInit
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/49104/2/src/soc/intel/cannonlake/fs... 
File src/soc/intel/cannonlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/49104/2/src/soc/intel/cannonlake/fs... 
PS2, Line 550: 1
What happens if setting this to zero?