Patch set updated for coreboot: 17ef2f3 devicetree: Change scan_bus() prototype in device ops

[Kyösti Mälkki]

Kyösti Mälkki ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8541

-gerrit

commit 17ef2f370afd8d188ca72a9f56748bb0e612b83d
Author: Kyösti Mälkki 
Date:   Thu Mar 19 21:04:23 2015 +0200

devicetree: Change scan_bus() prototype in device ops

The input/output value max is no longer used for tracking the
    bus enumeration sequence, everything is handled in the context
    of devicetree bus objects.

Change-Id: I545088bd8eaf205b1436d8c52d3bc7faf4cfb0f9
    Signed-off-by: Kyösti Mälkki 
---
 src/device/device.c                                | 16 +++++----------
 src/device/hypertransport.c                        |  4 ++--
 src/device/pci_device.c                            | 17 ++++-----------
 src/device/pciexp_device.c                         |  4 ++--
 src/device/pcix_device.c                           |  6 ++----
 src/device/root_device.c                           | 24 ++++++----------------
 src/include/device/device.h                        |  8 ++++----
 src/include/device/hypertransport.h                |  3 ++-
 src/include/device/pci.h                           |  4 ++--
 src/include/device/pciexp.h                        |  2 +-
 src/include/device/pcix.h                          |  3 ++-
 src/mainboard/emulation/qemu-i440fx/northbridge.c  |  5 ++---
 src/northbridge/amd/agesa/family10/northbridge.c   | 10 +++------
 src/northbridge/amd/agesa/family14/northbridge.c   |  3 +--
 src/northbridge/amd/agesa/family15/northbridge.c   | 10 +++------
 src/northbridge/amd/agesa/family15rl/northbridge.c |  3 +--
 src/northbridge/amd/agesa/family15tn/northbridge.c |  3 +--
 src/northbridge/amd/agesa/family16kb/northbridge.c |  3 +--
 src/northbridge/amd/amdfam10/northbridge.c         | 10 +++------
 src/northbridge/amd/amdk8/northbridge.c            | 10 +++------
 src/northbridge/amd/pi/00630F01/northbridge.c      |  3 +--
 src/northbridge/amd/pi/00730F01/northbridge.c      |  3 +--
 src/northbridge/intel/i3100/pciexp_porta.c         |  5 +++--
 src/northbridge/intel/i3100/pciexp_porta_ep80579.c |  5 +++--
 src/soc/intel/baytrail/pcie.c                      |  4 ++--
 src/southbridge/amd/amd8131/bridge.c               |  4 ++--
 src/southbridge/amd/amd8132/bridge.c               |  4 ++--
 src/southbridge/amd/cs5536/cs5536.c                |  4 ++--
 src/southbridge/intel/bd82x6x/pcie.c               |  7 ++-----
 src/southbridge/intel/i3100/pciexp_portb.c         |  5 +++--
 src/southbridge/intel/i82801ix/pcie.c              |  7 ++-----
 31 files changed, 73 insertions(+), 126 deletions(-)

diff --git a/src/device/device.c b/src/device/device.c
index a8900a6..6bdeae1 100644
--- a/src/device/device.c
+++ b/src/device/device.c
@@ -913,16 +913,13 @@ int reset_bus(struct bus *bus)
  * required, reset the bus and scan it again.
  *
  * @param busdev Pointer to the bus device.
- * @param max Current bus number.
- * @return The maximum bus number found, after scanning all subordinate buses.
  */
-static unsigned int scan_bus(struct device *busdev, unsigned int max)
+static void scan_bus(struct device *busdev)
 {
-	unsigned int new_max;
    int do_scan_bus;

if (!busdev->enabled)
-		return max;
+		return;

printk(BIOS_SPEW, "%s scanning...\n", dev_path(busdev));

@@ -931,7 +928,7 @@ static unsigned int scan_bus(struct device *busdev, unsigned int max)
    do_scan_bus = 1;
    while (do_scan_bus) {
    	struct bus *link;
-		new_max = busdev->ops->scan_bus(busdev, max);
+		busdev->ops->scan_bus(busdev);
    	do_scan_bus = 0;
    	for (link = busdev->link_list; link; link = link->next) {
    		if (link->reset_needed) {
@@ -942,20 +939,17 @@ static unsigned int scan_bus(struct device *busdev, unsigned int max)
    		}
    	}
    }
-	return new_max;
 }

void scan_bridges(struct bus *bus)
 {
    struct device *child;
-	unsigned int max = bus->secondary;

for (child = bus->children; child; child = child->sibling) {
    	if (!child->ops || !child->ops->scan_bus)
    		continue;
-		max = scan_bus(child, max);
+		scan_bus(child);
    }
-	bus->subordinate = max;
 }

/**
@@ -999,7 +993,7 @@ void dev_enumerate(void)
    	printk(BIOS_ERR, "dev_root missing scan_bus operation");
    	return;
    }
-	scan_bus(root, 0);
+	scan_bus(root);
    post_log_clear();
    printk(BIOS_INFO, "done\n");
 }
diff --git a/src/device/hypertransport.c b/src/device/hypertransport.c
index 799038c..584ac78 100644
--- a/src/device/hypertransport.c
+++ b/src/device/hypertransport.c
@@ -502,9 +502,9 @@ static void hypertransport_scan_chain_x(struct bus *bus,
    pci_scan_bus(bus, 0x00, ((next_unitid - 1) << 3) | 7);
 }

-unsigned int ht_scan_bridge(struct device *dev, unsigned int max)
+void ht_scan_bridge(struct device *dev)
 {
-	return do_pci_scan_bridge(dev, max, hypertransport_scan_chain_x);
+	do_pci_scan_bridge(dev, hypertransport_scan_chain_x);
 }

/** Default device operations for hypertransport bridges */
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 07b1993..6332209 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -1215,11 +1215,9 @@ static void pci_bridge_route(struct bus *link, scan_state state)
  * This function is the default scan_bus() method for PCI bridge devices.
  *
  * @param dev Pointer to the bridge device.
- * @param max The highest bus number assigned up to now.
  * @param do_scan_bus TODO
- * @return The maximum bus number found, after scanning all subordinate buses.
  */
-unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
+void do_pci_scan_bridge(struct device *dev,
    			void (*do_scan_bus) (struct bus * bus,
    						     unsigned min_devfn,
    						     unsigned max_devfn))
@@ -1245,8 +1243,6 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
    do_scan_bus(bus, 0x00, 0xff);

pci_bridge_route(bus, PCI_ROUTE_FINAL);
-
-	return bus->subordinate;
 }

/**
@@ -1258,12 +1254,10 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
  * This function is the default scan_bus() method for PCI bridge devices.
  *
  * @param dev Pointer to the bridge device.
- * @param max The highest bus number assigned up to now.
- * @return The maximum bus number found, after scanning all subordinate buses.
  */
-unsigned int pci_scan_bridge(struct device *dev, unsigned int max)
+void pci_scan_bridge(struct device *dev)
 {
-	return do_pci_scan_bridge(dev, max, pci_scan_bus);
+	do_pci_scan_bridge(dev, pci_scan_bus);
 }

/**
@@ -1272,14 +1266,11 @@ unsigned int pci_scan_bridge(struct device *dev, unsigned int max)
  * This function is the default scan_bus() method for PCI domains.
  *
  * @param dev Pointer to the domain.
- * @param max The highest bus number assigned up to now.
- * @return The maximum bus number found, after scanning all subordinate busses.
  */
-unsigned int pci_domain_scan_bus(device_t dev, unsigned int unused)
+void pci_domain_scan_bus(device_t dev)
 {
    struct bus *link = dev->link_list;
    pci_scan_bus(link, PCI_DEVFN(0, 0), 0xff);
-	return unused;
 }

/**
diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c
index 5311397..ee24456 100644
--- a/src/device/pciexp_device.c
+++ b/src/device/pciexp_device.c
@@ -432,9 +432,9 @@ void pciexp_scan_bus(struct bus *bus, unsigned int min_devfn,
    }
 }

-unsigned int pciexp_scan_bridge(device_t dev, unsigned int max)
+void pciexp_scan_bridge(device_t dev)
 {
-	return do_pci_scan_bridge(dev, max, pciexp_scan_bus);
+	do_pci_scan_bridge(dev, pciexp_scan_bus);
 }

/** Default device operations for PCI Express bridges */
diff --git a/src/device/pcix_device.c b/src/device/pcix_device.c
index cfa2f91..7ed64df 100644
--- a/src/device/pcix_device.c
+++ b/src/device/pcix_device.c
@@ -112,12 +112,12 @@ const char *pcix_speed(u16 sstatus)
    return result;
 }

-unsigned int pcix_scan_bridge(device_t dev, unsigned int max)
+void pcix_scan_bridge(device_t dev)
 {
    unsigned int pos;
    u16 sstatus;

-	max = do_pci_scan_bridge(dev, max, pci_scan_bus);
+	do_pci_scan_bridge(dev, pci_scan_bus);

/* Find the PCI-X capability. */
    pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
@@ -129,8 +129,6 @@ unsigned int pcix_scan_bridge(device_t dev, unsigned int max)
    /* Print the PCI-X bus speed. */
    printk(BIOS_DEBUG, "PCI: %02x: %s\n", dev->link_list->secondary,
           pcix_speed(sstatus));
-
-	return max;
 }

/** Default device operations for PCI-X bridges */
diff --git a/src/device/root_device.c b/src/device/root_device.c
index 4eae12a..0185275 100644
--- a/src/device/root_device.c
+++ b/src/device/root_device.c
@@ -45,11 +45,9 @@ const char mainboard_name[] = CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_
  * file under some static bus in order to be enumerated at run time.
  *
  * @param bus Pointer to the device to which the static buses are attached to.
- * @param max Maximum bus number currently used before scanning.
- * @return The largest bus number used.
  */

-static unsigned int scan_static_bus(device_t bus, unsigned int passthru)
+static void scan_static_bus(device_t bus)
 {
    device_t child;
    struct bus *link;
@@ -67,22 +65,18 @@ static unsigned int scan_static_bus(device_t bus, unsigned int passthru)
    		       child->enabled ? "enabled" : "disabled");
    	}
    }
-
-	return passthru;
 }

-unsigned int scan_lpc_bus(device_t bus, unsigned int passthru)
+void scan_lpc_bus(device_t bus)
 {
    printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus));

-	scan_static_bus(bus, 0);
+	scan_static_bus(bus);

printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus));
-
-	return passthru;
 }

-unsigned int scan_smbus(device_t bus, unsigned int passthru)
+void scan_smbus(device_t bus)
 {
    device_t child;
    struct bus *link;
@@ -111,8 +105,6 @@ unsigned int scan_smbus(device_t bus, unsigned int passthru)
    }

printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus));
-
-	return passthru;
 }

/**
@@ -121,23 +113,19 @@ unsigned int scan_smbus(device_t bus, unsigned int passthru)
  * This function is the default scan_bus() method of the root device.
  *
  * @param root The root device structure.
- * @param max The current bus number scanned so far, usually 0x00.
- * @return The largest bus number used.
  */
-static unsigned int root_dev_scan_bus(device_t bus, unsigned int passthru)
+static void root_dev_scan_bus(device_t bus)
 {
    struct bus *link;

printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus));

-	scan_static_bus(bus, 0);
+	scan_static_bus(bus);

for (link = bus->link_list; link; link = link->next)
    	scan_bridges(link);

printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus));
-
-	return passthru;
 }

static void root_dev_reset(struct bus *bus)
diff --git a/src/include/device/device.h b/src/include/device/device.h
index 84a17d0..9c53f95 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -46,7 +46,7 @@ struct device_operations {
    void (*enable_resources)(device_t dev);
    void (*init)(device_t dev);
    void (*final)(device_t dev);
-	unsigned int (*scan_bus)(device_t bus, unsigned int _max);
+	void (*scan_bus)(device_t bus);
    void (*enable)(device_t dev);
    void (*disable)(device_t dev);
    void (*set_link)(device_t dev, unsigned int link);
@@ -224,13 +224,13 @@ void show_all_devs_resources(int debug_level, const char* msg);

extern struct device_operations default_dev_ops_root;
 void pci_domain_read_resources(struct device *dev);
-unsigned int pci_domain_scan_bus(struct device *dev, unsigned int _max);
+void pci_domain_scan_bus(struct device *dev);

void fixed_mem_resource(device_t dev, unsigned long index,
    	  unsigned long basek, unsigned long sizek, unsigned long type);

-unsigned int scan_smbus(device_t bus, unsigned int _max);
-unsigned int scan_lpc_bus(device_t bus, unsigned int _max);
+void scan_smbus(device_t bus);
+void scan_lpc_bus(device_t bus);

/* It is the caller's responsibility to adjust regions such that ram_resource()
  * and mmio_resource() do not overlap.
diff --git a/src/include/device/hypertransport.h b/src/include/device/hypertransport.h
index 03e327d..22e0ac4 100644
--- a/src/include/device/hypertransport.h
+++ b/src/include/device/hypertransport.h
@@ -5,7 +5,8 @@

unsigned int hypertransport_scan_chain(struct bus *bus,
    unsigned min_devfn, unsigned max_devfn, unsigned *ht_unit_base, unsigned offset_unitid);
-unsigned int ht_scan_bridge(struct device *dev, unsigned int max);
+void ht_scan_bridge(struct device *dev);
+
 extern struct device_operations default_ht_ops_bus;

#define HT_IO_HOST_ALIGN 4096
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index f1dcd03..2a76ba9 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -71,11 +71,11 @@ void pci_bus_enable_resources(device_t dev);
 void pci_bus_reset(struct bus *bus);
 device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn);

-unsigned int do_pci_scan_bridge(device_t bus, unsigned int max,
+void do_pci_scan_bridge(device_t bus,
    void (*do_scan_bus)(struct bus *bus,
    	unsigned min_devfn, unsigned max_devfn));
-unsigned int pci_scan_bridge(device_t bus, unsigned int max);

+void pci_scan_bridge(device_t bus);
 void pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn);

uint8_t pci_moving_config8(struct device *dev, unsigned reg);
diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h
index b600228..f3df1a5 100644
--- a/src/include/device/pciexp.h
+++ b/src/include/device/pciexp.h
@@ -12,7 +12,7 @@ enum aspm_type {
 void pciexp_scan_bus(struct bus *bus, unsigned int min_devfn,
    		     unsigned int max_devfn);

-unsigned int pciexp_scan_bridge(device_t dev, unsigned int max);
+void pciexp_scan_bridge(device_t dev);

extern struct device_operations default_pciexp_ops_bus;

diff --git a/src/include/device/pcix.h b/src/include/device/pcix.h
index 75be7aa..024c548 100644
--- a/src/include/device/pcix.h
+++ b/src/include/device/pcix.h
@@ -2,7 +2,8 @@
 #define DEVICE_PCIX_H
 /* (c) 2005 Linux Networx GPL see COPYING for details */

-unsigned int pcix_scan_bridge(device_t dev, unsigned int max);
+void pcix_scan_bridge(device_t dev);
+
 const char *pcix_speed(u16 sstatus);

extern struct device_operations default_pcix_ops_bus;
diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c
index 1967c8b..26cbda5 100644
--- a/src/mainboard/emulation/qemu-i440fx/northbridge.c
+++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c
@@ -241,14 +241,14 @@ static void cpu_bus_init(device_t dev)
    initialize_cpus(dev->link_list);
 }

-static unsigned int cpu_bus_scan(device_t bus, unsigned int passthru)
+static void cpu_bus_scan(device_t bus)
 {
    int max_cpus = fw_cfg_max_cpus();
    device_t cpu;
    int i;

if (max_cpus < 0)
-		return 0;
+		return;

/*
     * TODO: This only handles the simple "qemu -smp $nr" case
@@ -261,7 +261,6 @@ static unsigned int cpu_bus_scan(device_t bus, unsigned int passthru)
    	if (cpu)
    		set_cpu_topology(cpu, 1, 0, i, 0);
    }
-	return max_cpus;
 }

static struct device_operations cpu_bus_ops = {
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index 6ba6770..0fe1910 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -554,7 +554,7 @@ static void mcf0_control_init(struct device *dev)
 {
 }

-static unsigned amdfam10_scan_chains(device_t dev, unsigned unused)
+static void amdfam10_scan_chains(device_t dev)
 {
    unsigned nodeid;
    struct bus *link;
@@ -580,8 +580,6 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned unused)
    }

dev->bus->subordinate = max;
-
-	return unused;
 }

static struct device_operations northbridge_operations = {
@@ -907,7 +905,7 @@ static void amdfam10_domain_set_resources(device_t dev)
    }
 }

-static u32 amdfam10_domain_scan_bus(device_t dev, u32 unused)
+static void amdfam10_domain_scan_bus(device_t dev)
 {
    u32 reg;
    int i;
@@ -944,7 +942,6 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 unused)
    		pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc);
    	}
    }
-	return unused;
 }

@@ -1012,7 +1009,7 @@ static void add_more_links(device_t dev, unsigned total_links)
    last->next = NULL;
 }

-static u32 cpu_bus_scan(device_t dev, u32 passthru)
+static void cpu_bus_scan(device_t dev)
 {
    struct bus *cpu_bus;
    device_t dev_mc;
@@ -1188,7 +1185,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru)
    			amd_cpu_topology(cpu, i, j);
    	} //j
    }
-	return passthru;
 }

static void cpu_bus_init(device_t dev)
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 426ec74..32b74f6 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -765,7 +765,7 @@ static void domain_enable_resources(device_t dev)

/* Bus related code */

-static u32 cpu_bus_scan(struct device *dev, u32 passthru)
+static void cpu_bus_scan(struct device *dev)
 {
    struct bus *cpu_bus = dev->link_list;
    device_t cpu;
@@ -784,7 +784,6 @@ static u32 cpu_bus_scan(struct device *dev, u32 passthru)
    	if (cpu)
    		amd_cpu_topology(cpu, 0, apic_id);
    }
-	return passthru;
 }

static void cpu_bus_init(device_t dev)
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index e480eba..94e16ac 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -459,7 +459,7 @@ static void nb_set_resources(device_t dev)
    }
 }

-static unsigned scan_chains(device_t dev, unsigned unused)
+static void scan_chains(device_t dev)
 {
    unsigned nodeid;
    struct bus *link;
@@ -485,8 +485,6 @@ static unsigned scan_chains(device_t dev, unsigned unused)
    }

dev->bus->subordinate = max;
-
-	return unused;
 }

@@ -953,11 +951,10 @@ static void domain_set_resources(device_t dev)
 }

/* all family15's pci devices are under 0x18.0, so we search from dev 0x18 fun 0 */
-static unsigned int f15_pci_domain_scan_bus(device_t dev, unsigned int unused)
+static void f15_pci_domain_scan_bus(device_t dev)
 {
    struct bus *link = dev->link_list;
    pci_scan_bus(link, PCI_DEVFN(0x18, 0), 0xff);
-	return unused;
 }

static struct device_operations pci_domain_ops = {
@@ -1011,7 +1008,7 @@ static void add_more_links(device_t dev, unsigned total_links)
    last->next = NULL;
 }

-static u32 cpu_bus_scan(device_t dev, u32 passthru)
+static void cpu_bus_scan(device_t dev)
 {
    struct bus *cpu_bus;
    device_t dev_mc;
@@ -1187,7 +1184,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru)
    			amd_cpu_topology(cpu, i, j);
    	} //j
    }
-	return passthru;
 }

static void cpu_bus_init(device_t dev)
diff --git a/src/northbridge/amd/agesa/family15rl/northbridge.c b/src/northbridge/amd/agesa/family15rl/northbridge.c
index d322fdc..0a1e7d3 100644
--- a/src/northbridge/amd/agesa/family15rl/northbridge.c
+++ b/src/northbridge/amd/agesa/family15rl/northbridge.c
@@ -992,7 +992,7 @@ static void add_more_links(struct device *dev, unsigned total_links)
    last->next = NULL;
 }

-static u32 cpu_bus_scan(device_t dev, u32 passthru)
+static void cpu_bus_scan(device_t dev)
 {
    struct bus *cpu_bus;
    device_t dev_mc;
@@ -1166,7 +1166,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru)
    			amd_cpu_topology(cpu, i, j);
    	} //j
    }
-	return passthru;
 }

static void cpu_bus_init(struct device *dev)
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 08287dc..37b6a8e 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -991,7 +991,7 @@ static void add_more_links(device_t dev, unsigned total_links)
    last->next = NULL;
 }

-static u32 cpu_bus_scan(device_t dev, u32 passthru)
+static void cpu_bus_scan(device_t dev)
 {
    struct bus *cpu_bus;
    device_t dev_mc;
@@ -1165,7 +1165,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru)
    			amd_cpu_topology(cpu, i, j);
    	} //j
    }
-	return passthru;
 }

static void cpu_bus_init(device_t dev)
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index 7c603c0..9bbc279 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -1008,7 +1008,7 @@ static void add_more_links(device_t dev, unsigned total_links)
    last->next = NULL;
 }

-static u32 cpu_bus_scan(device_t dev, u32 passthru)
+static void cpu_bus_scan(device_t dev)
 {
    struct bus *cpu_bus;
    device_t dev_mc;
@@ -1182,7 +1182,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru)
    			amd_cpu_topology(cpu, i, j);
    	} //j
    }
-	return passthru;
 }

static void cpu_bus_init(device_t dev)
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index ff36bf5..4734522 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -285,7 +285,7 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool
    	return link->subordinate;
 }

-static unsigned amdfam10_scan_chains(device_t dev, unsigned unused)
+static void amdfam10_scan_chains(device_t dev)
 {
    unsigned nodeid;
    struct bus *link;
@@ -310,8 +310,6 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned unused)
    }

dev->bus->subordinate = max;
-
-	return unused;
 }

@@ -912,7 +910,7 @@ static void amdfam10_domain_set_resources(device_t dev)
    }
 }

-static u32 amdfam10_domain_scan_bus(device_t dev, u32 unused)
+static void amdfam10_domain_scan_bus(device_t dev)
 {
    u32 reg;
    int i;
@@ -949,7 +947,6 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 unused)
    		pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc);
    	}
    }
-	return unused;
 }

#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES)
@@ -1214,7 +1211,7 @@ static void add_more_links(device_t dev, unsigned total_links)
    last->next = NULL;
 }

-static u32 cpu_bus_scan(device_t dev, u32 passthru)
+static void cpu_bus_scan(device_t dev)
 {
    struct bus *cpu_bus;
    device_t dev_mc;
@@ -1383,7 +1380,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru)
    			amd_cpu_topology(cpu, i, j);
    	} //j
    }
-	return passthru;
 }

static void cpu_bus_init(device_t dev)
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 63a25ab..45cff9e 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -241,7 +241,7 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_
    	return link->subordinate;
 }

-static unsigned amdk8_scan_chains(device_t dev, unsigned unused)
+static void amdk8_scan_chains(device_t dev)
 {
    unsigned nodeid;
    struct bus *link;
@@ -268,8 +268,6 @@ static unsigned amdk8_scan_chains(device_t dev, unsigned unused)
    }

dev->bus->subordinate = max;
-
-	return unused;
 }

@@ -1095,7 +1093,7 @@ static void amdk8_domain_set_resources(device_t dev)

}

-static u32 amdk8_domain_scan_bus(device_t dev, u32 unused)
+static void amdk8_domain_scan_bus(device_t dev)
 {
    u32 reg;
    int i;
@@ -1131,7 +1129,6 @@ static u32 amdk8_domain_scan_bus(device_t dev, u32 unused)
    		pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc);
    	}
    }
-	return unused;
 }

static struct device_operations pci_domain_ops = {
@@ -1180,7 +1177,7 @@ static void add_more_links(device_t dev, unsigned total_links)
    last->next = NULL;
 }

-static u32 cpu_bus_scan(device_t dev, u32 passthru)
+static void cpu_bus_scan(device_t dev)
 {
    struct bus *cpu_bus;
    device_t dev_mc;
@@ -1319,7 +1316,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru)
    			amd_cpu_topology(cpu, i, j);
    	} //j
    }
-	return passthru;
 }

static void cpu_bus_init(device_t dev)
diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c
index e0fc11e..60a1d49 100644
--- a/src/northbridge/amd/pi/00630F01/northbridge.c
+++ b/src/northbridge/amd/pi/00630F01/northbridge.c
@@ -985,7 +985,7 @@ static void add_more_links(device_t dev, unsigned total_links)
    last->next = NULL;
 }

-static u32 cpu_bus_scan(device_t dev, u32 passthru)
+static void cpu_bus_scan(device_t dev)
 {
    struct bus *cpu_bus;
    device_t dev_mc;
@@ -1176,7 +1176,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru)
    			amd_cpu_topology(cpu, i, j);
    	} //j
    }
-	return passthru;
 }

static void cpu_bus_init(device_t dev)
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index 71099d9..8e340ce 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -1001,7 +1001,7 @@ static void add_more_links(device_t dev, unsigned total_links)
    last->next = NULL;
 }

-static u32 cpu_bus_scan(device_t dev, u32 passthru)
+static void cpu_bus_scan(device_t dev)
 {
    struct bus *cpu_bus;
    device_t dev_mc;
@@ -1187,7 +1187,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru)
    			amd_cpu_topology(cpu, i, j);
    	} //j
    }
-	return passthru;
 }

static void cpu_bus_init(device_t dev)
diff --git a/src/northbridge/intel/i3100/pciexp_porta.c b/src/northbridge/intel/i3100/pciexp_porta.c
index b37e3cf..a4be7a6 100644
--- a/src/northbridge/intel/i3100/pciexp_porta.c
+++ b/src/northbridge/intel/i3100/pciexp_porta.c
@@ -45,7 +45,7 @@ static void pcie_init(struct device *dev)

}

-static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max)
+static void pcie_scan_bridge(struct device *dev)
 {
    u16 val;
    u16 ctl;
@@ -62,7 +62,8 @@ static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max)
    		hard_reset();
    	}
    } while	(val & (3<<10));
-	return pciexp_scan_bridge(dev, max);
+
+	pciexp_scan_bridge(dev);
 }

static struct device_operations pcie_ops  = {
diff --git a/src/northbridge/intel/i3100/pciexp_porta_ep80579.c b/src/northbridge/intel/i3100/pciexp_porta_ep80579.c
index 31cd29f..f7e3a6a 100644
--- a/src/northbridge/intel/i3100/pciexp_porta_ep80579.c
+++ b/src/northbridge/intel/i3100/pciexp_porta_ep80579.c
@@ -67,7 +67,7 @@ static void pcie_bus_enable_resources(struct device *dev)
 }

-static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max)
+static void pcie_scan_bridge(struct device *dev)
 {
    u16 val;
    u16 ctl;
@@ -84,7 +84,8 @@ static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max)
    		hard_reset();
    	}
    } while	(val & (3<<10));
-	return pciexp_scan_bridge(dev, max);
+
+	pciexp_scan_bridge(dev);
 }

static struct device_operations pcie_ops  = {
diff --git a/src/soc/intel/baytrail/pcie.c b/src/soc/intel/baytrail/pcie.c
index e4c0654..4a050fa 100644
--- a/src/soc/intel/baytrail/pcie.c
+++ b/src/soc/intel/baytrail/pcie.c
@@ -230,7 +230,7 @@ static void byt_pcie_enable(device_t dev)
    southcluster_enable_dev(dev);
 }

-static unsigned int byt_pciexp_scan_bridge(device_t dev, unsigned int max)
+static void byt_pciexp_scan_bridge(device_t dev)
 {
    static const struct reg_script wait_for_link_active[] = {
    	REG_PCI_POLL32(LCTL, (1 << 29) , (1 << 29), 50000),
@@ -240,7 +240,7 @@ static unsigned int byt_pciexp_scan_bridge(device_t dev, unsigned int max)
    /* wait for Link Active with 50ms timeout */
    reg_script_run_on_dev(dev, wait_for_link_active);

-	return do_pci_scan_bridge(dev, max, pciexp_scan_bus);
+	do_pci_scan_bridge(dev, pciexp_scan_bus);
 }

static void pcie_root_set_subsystem(device_t dev, unsigned vid, unsigned did)
diff --git a/src/southbridge/amd/amd8131/bridge.c b/src/southbridge/amd/amd8131/bridge.c
index cb76980..1587268 100644
--- a/src/southbridge/amd/amd8131/bridge.c
+++ b/src/southbridge/amd/amd8131/bridge.c
@@ -265,9 +265,9 @@ static void amd8131_scan_bus(struct bus *bus,
    }
 }

-static unsigned int amd8131_scan_bridge(device_t dev, unsigned int max)
+static void amd8131_scan_bridge(device_t dev)
 {
-	return do_pci_scan_bridge(dev, max, amd8131_scan_bus);
+	do_pci_scan_bridge(dev, amd8131_scan_bus);
 }

diff --git a/src/southbridge/amd/amd8132/bridge.c b/src/southbridge/amd/amd8132/bridge.c
index 48d7c51..027a085 100644
--- a/src/southbridge/amd/amd8132/bridge.c
+++ b/src/southbridge/amd/amd8132/bridge.c
@@ -194,9 +194,9 @@ static void amd8132_scan_bus(struct bus *bus,
    amd8132_walk_children(bus, amd8132_pcix_tune_dev, &info);
 }

-static unsigned int amd8132_scan_bridge(device_t dev, unsigned int max)
+static void amd8132_scan_bridge(device_t dev)
 {
-	return do_pci_scan_bridge(dev, max, amd8132_scan_bus);
+	do_pci_scan_bridge(dev, amd8132_scan_bus);
 }

diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c
index cece16d..67eabb0 100644
--- a/src/southbridge/amd/cs5536/cs5536.c
+++ b/src/southbridge/amd/cs5536/cs5536.c
@@ -688,10 +688,10 @@ static struct smbus_bus_operations lops_smbus_bus = {
    .read_byte  = lsmbus_read_byte,
 };

-static unsigned int scan_lpc_smbus(device_t dev, unsigned int max)
+static void scan_lpc_smbus(device_t dev)
 {
    /* FIXME. Do we have mixed LPC/SMBus device node here. */
-	return scan_smbus(dev, max);
+	scan_smbus(dev);
 }

static struct device_operations southbridge_ops = {
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index 42a8578..1b8ac76 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -273,13 +273,12 @@ static void pch_pcie_enable(device_t dev)
    pch_pcie_pm_early(dev);
 }

-static unsigned int pch_pciexp_scan_bridge(device_t dev, unsigned int max)
+static void pch_pciexp_scan_bridge(device_t dev)
 {
-	unsigned int ret;
    struct southbridge_intel_bd82x6x_config *config = dev->chip_info;

/* Normal PCIe Scan */
-	ret = pciexp_scan_bridge(dev, max);
+	pciexp_scan_bridge(dev);

if (config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) {
    	intel_acpi_pcie_hotplug_scan_slot(dev->link_list);
@@ -287,8 +286,6 @@ static unsigned int pch_pciexp_scan_bridge(device_t dev, unsigned int max)

/* Late Power Management init after bridge device enumeration */
    pch_pcie_pm_late(dev);
-
-	return ret;
 }

static void pcie_set_subsystem(device_t dev, unsigned vendor, unsigned device)
diff --git a/src/southbridge/intel/i3100/pciexp_portb.c b/src/southbridge/intel/i3100/pciexp_portb.c
index 815c081..41e921c 100644
--- a/src/southbridge/intel/i3100/pciexp_portb.c
+++ b/src/southbridge/intel/i3100/pciexp_portb.c
@@ -39,7 +39,7 @@ static void pcie_init(struct device *dev)
 {
 }

-static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max)
+static void pcie_scan_bridge(struct device *dev)
 {
    u16 val;
    u16 ctl;
@@ -56,7 +56,8 @@ static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max)
    		hard_reset();
    	}
    } while	(val & (3<<10));
-	return pciexp_scan_bridge(dev, max);
+
+	pciexp_scan_bridge(dev);
 }

static struct device_operations pcie_ops  = {
diff --git a/src/southbridge/intel/i82801ix/pcie.c b/src/southbridge/intel/i82801ix/pcie.c
index 58c0e19..5858176 100644
--- a/src/southbridge/intel/i82801ix/pcie.c
+++ b/src/southbridge/intel/i82801ix/pcie.c
@@ -110,19 +110,16 @@ static void pcie_set_subsystem(device_t dev, unsigned vendor, unsigned device)
    }
 }

-static unsigned int pch_pciexp_scan_bridge(device_t dev, unsigned int max)
+static void pch_pciexp_scan_bridge(device_t dev)
 {
-	unsigned int ret;
    struct southbridge_intel_i82801ix_config *config = dev->chip_info;

/* Normal PCIe Scan */
-	ret = pciexp_scan_bridge(dev, max);
+	pciexp_scan_bridge(dev);

if (config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) {
    	intel_acpi_pcie_hotplug_scan_slot(dev->link_list);
    }
-
-	return ret;
 }

static struct pci_operations pci_ops = {