[S] Change in coreboot[master]: ec/google/chromec: Host event support of DTTS

[Tim Van Patten (Code Review)]

Attention is currently required from: Raul Rangel, Jason Nien, EricKY Cheng, Isaac Lee, Tim Wawrzynczak, Jon Murphy, Martin Roth, Moises Garcia, Eric Peers, Karthik Ramasubramanian.

Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67793 )

Change subject: ec/google/chromec: Host event support of DTTS
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Patch Set 11:

(6 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/67793/comment/cc37ece4_9eca61c9 
PS4, Line 7: evet
> typo

Done

Commit Message:

https://review.coreboot.org/c/coreboot/+/67793/comment/4077662d_fc321966 
PS11, Line 7: ec/google/chromec: Host event support of DTTS
nit: This CL is adding DPTC calls to specific host events. To be more accurate, I'd update this to use the line in the description:
> Add DPTC support for host event 1/2/9

https://review.coreboot.org/c/coreboot/+/67793/comment/10b80ba1_963128bf 
PS11, Line 10: 29
Event 29 is not handled by this CL.

File src/ec/google/chromeec/acpi/ec.asl:

https://review.coreboot.org/c/coreboot/+/67793/comment/09fe2197_3917a8a3 
PS8, Line 59:
> whitespace: use a tab, rather than spaces, to match the other lines.

Done

https://review.coreboot.org/c/coreboot/+/67793/comment/50393b77_b9195f91 
PS8, Line 60: tempture
> typo

Done

https://review.coreboot.org/c/coreboot/+/67793/comment/cb3c2577_21a45d79 
PS8, Line 59: 		RSV1, 1,    // Reserved bit
            : 		STTT, 1,    // Switch thermal table by tempture(bit 5)
            : 		STTB, 1,    // Switch thermal table by body detection(bit 6)
> Please move this change into a separate CL that describes what they are used for.

Done