Change in coreboot[master]: AGESA,binaryPI: Add compatibility wrapper for romstage entry
Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37352 )
Change subject: AGESA,binaryPI: Add compatibility wrapper for romstage entry ......................................................................
AGESA,binaryPI: Add compatibility wrapper for romstage entry
This simplifies transition and reviews towards C environment bootblock by allowing single cache_as_ram.S file to be used.
Change-Id: I231972982e5ca6d0c08437693edf926b0eaf9ee1 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/drivers/amd/agesa/cache_as_ram.S M src/drivers/amd/agesa/romstage.c M src/include/bootblock_common.h D src/include/cpu/amd/car.h 4 files changed, 30 insertions(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/37352/1
diff --git a/src/drivers/amd/agesa/cache_as_ram.S b/src/drivers/amd/agesa/cache_as_ram.S index 8d5db98..557c390 100644 --- a/src/drivers/amd/agesa/cache_as_ram.S +++ b/src/drivers/amd/agesa/cache_as_ram.S @@ -30,9 +30,6 @@
_cache_as_ram_setup:
- /* Preserve BIST. */ - movd %eax, %mm0 - post_code(0xa0)
AMD_ENABLE_STACK @@ -50,16 +47,16 @@
mov $_ecar_stack, %esp
- /* Align the stack. */ - and $0xFFFFFFF0, %esp + /* Align the stack and keep aligned for call to bootblock_c_entry() */ + and $0xfffffff0, %esp + sub $8, %esp
- /* Must maintain 16-byte stack alignment here. */ - pushl $0x0 - pushl $0x0 - pushl $0x0 - movd %mm0, %eax /* bist */ - pushl %eax - call romstage_main + pushl $0 /* tsc[63:32] */ + pushl $0 /* tsc[31:0] */ + + post_code(0xa2) + + call bootblock_c_entry
/* Never reached. */
@@ -69,9 +66,9 @@ jmp stop
ap_entry: - /* Align the stack for call to ap_romstage_main() */ + /* Align the stack for call to ap_bootblock_c_entry() */ and $0xfffffff0, %esp - call ap_romstage_main + call ap_bootblock_c_entry
/* Never reached. */ jmp stop diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c index 571397f..48a81c5 100644 --- a/src/drivers/amd/agesa/romstage.c +++ b/src/drivers/amd/agesa/romstage.c @@ -14,8 +14,8 @@ #include <arch/acpi.h> #include <arch/cpu.h> #include <arch/romstage.h> +#include <bootblock_common.h> #include <cbmem.h> -#include <cpu/amd/car.h> #include <console/console.h> #include <halt.h> #include <program_loading.h> @@ -39,7 +39,7 @@ agesa_set_interface(cb); }
-asmlinkage void romstage_main(unsigned long bist) +static void romstage_main(void) { struct postcar_frame pcf; struct sysinfo romstage_state; @@ -99,7 +99,7 @@ /* We do not return. */ }
-asmlinkage void ap_romstage_main(void) +static void ap_romstage_main(void) { struct sysinfo romstage_state; struct sysinfo *cb = &romstage_state; @@ -116,3 +116,16 @@ /* Not reached. */ halt(); } + +/* This wrapper enables easy transition away from ROMCC_BOOTBLOCK + * keeping changes in cache_as_ram.S easy to manage. + */ +asmlinkage void bootblock_c_entry(uint64_t base_timestamp) +{ + romstage_main(); +} + +asmlinkage void ap_bootblock_c_entry(void) +{ + ap_romstage_main(); +} diff --git a/src/include/bootblock_common.h b/src/include/bootblock_common.h index 1081f27..eb9c24c 100644 --- a/src/include/bootblock_common.h +++ b/src/include/bootblock_common.h @@ -38,6 +38,9 @@ asmlinkage void bootblock_c_entry(uint64_t base_timestamp); asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist);
+/* To be used when APs execute through bootblock too. */ +asmlinkage void ap_bootblock_c_entry(void); + void bootblock_main_with_basetime(uint64_t base_timestamp);
/* This is the argument structure passed from decompressor to bootblock. */ diff --git a/src/include/cpu/amd/car.h b/src/include/cpu/amd/car.h deleted file mode 100644 index f57ea82..0000000 --- a/src/include/cpu/amd/car.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef _CPU_AMD_CAR_H -#define _CPU_AMD_CAR_H - -#include <arch/cpu.h> - -asmlinkage void romstage_main(unsigned long bist); -asmlinkage void ap_romstage_main(void); - -#endif
Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37352 )
Change subject: AGESA,binaryPI: Add compatibility wrapper for romstage entry ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37352/1/src/drivers/amd/agesa/romst... File src/drivers/amd/agesa/romstage.c:
https://review.coreboot.org/c/coreboot/+/37352/1/src/drivers/amd/agesa/romst... PS1, Line 125: romstage_main(); So we basically omit bootblock_main... Is there any other rationale than saving tens of miliseconds to do that?
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37352 )
Change subject: AGESA,binaryPI: Add compatibility wrapper for romstage entry ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37352/1/src/drivers/amd/agesa/romst... File src/drivers/amd/agesa/romstage.c:
https://review.coreboot.org/c/coreboot/+/37352/1/src/drivers/amd/agesa/romst... PS1, Line 125: romstage_main();
So we basically omit bootblock_main... […]
This code will be guarded with ROMCC_BOOTBLOCK in immediate followup.
Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37352 )
Change subject: AGESA,binaryPI: Add compatibility wrapper for romstage entry ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/37352/1/src/drivers/amd/agesa/romst... File src/drivers/amd/agesa/romstage.c:
https://review.coreboot.org/c/coreboot/+/37352/1/src/drivers/amd/agesa/romst... PS1, Line 125: romstage_main();
This code will be guarded with ROMCC_BOOTBLOCK in immediate followup.
Ack
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37352 )
Change subject: AGESA,binaryPI: Add compatibility wrapper for romstage entry ......................................................................
Patch Set 2: Code-Review+2
Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37352 )
Change subject: AGESA,binaryPI: Add compatibility wrapper for romstage entry ......................................................................
AGESA,binaryPI: Add compatibility wrapper for romstage entry
This simplifies transition and reviews towards C environment bootblock by allowing single cache_as_ram.S file to be used.
Change-Id: I231972982e5ca6d0c08437693edf926b0eaf9ee1 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/37352 Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Michał Żygowski michal.zygowski@3mdeb.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/drivers/amd/agesa/cache_as_ram.S M src/drivers/amd/agesa/romstage.c M src/include/bootblock_common.h D src/include/cpu/amd/car.h 4 files changed, 30 insertions(+), 26 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Michał Żygowski: Looks good to me, approved
diff --git a/src/drivers/amd/agesa/cache_as_ram.S b/src/drivers/amd/agesa/cache_as_ram.S index e86830f..4417e64 100644 --- a/src/drivers/amd/agesa/cache_as_ram.S +++ b/src/drivers/amd/agesa/cache_as_ram.S @@ -30,9 +30,6 @@
_cache_as_ram_setup:
- /* Preserve BIST. */ - movd %eax, %mm0 - post_code(0xa0)
AMD_ENABLE_STACK @@ -50,16 +47,16 @@
mov $_ecar_stack, %esp
- /* Align the stack. */ - and $0xFFFFFFF0, %esp + /* Align the stack and keep aligned for call to bootblock_c_entry() */ + and $0xfffffff0, %esp + sub $8, %esp
- /* Must maintain 16-byte stack alignment here. */ - pushl $0x0 - pushl $0x0 - pushl $0x0 - movd %mm0, %eax /* bist */ - pushl %eax - call romstage_main + pushl $0 /* tsc[63:32] */ + pushl $0 /* tsc[31:0] */ + + post_code(0xa2) + + call bootblock_c_entry
/* Never reached. */
@@ -69,9 +66,9 @@ jmp stop
ap_entry: - /* Align the stack for call to ap_romstage_main() */ + /* Align the stack for call to ap_bootblock_c_entry() */ and $0xfffffff0, %esp - call ap_romstage_main + call ap_bootblock_c_entry
/* Never reached. */ jmp stop diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c index 571397f..48a81c5 100644 --- a/src/drivers/amd/agesa/romstage.c +++ b/src/drivers/amd/agesa/romstage.c @@ -14,8 +14,8 @@ #include <arch/acpi.h> #include <arch/cpu.h> #include <arch/romstage.h> +#include <bootblock_common.h> #include <cbmem.h> -#include <cpu/amd/car.h> #include <console/console.h> #include <halt.h> #include <program_loading.h> @@ -39,7 +39,7 @@ agesa_set_interface(cb); }
-asmlinkage void romstage_main(unsigned long bist) +static void romstage_main(void) { struct postcar_frame pcf; struct sysinfo romstage_state; @@ -99,7 +99,7 @@ /* We do not return. */ }
-asmlinkage void ap_romstage_main(void) +static void ap_romstage_main(void) { struct sysinfo romstage_state; struct sysinfo *cb = &romstage_state; @@ -116,3 +116,16 @@ /* Not reached. */ halt(); } + +/* This wrapper enables easy transition away from ROMCC_BOOTBLOCK + * keeping changes in cache_as_ram.S easy to manage. + */ +asmlinkage void bootblock_c_entry(uint64_t base_timestamp) +{ + romstage_main(); +} + +asmlinkage void ap_bootblock_c_entry(void) +{ + ap_romstage_main(); +} diff --git a/src/include/bootblock_common.h b/src/include/bootblock_common.h index 1081f27..eb9c24c 100644 --- a/src/include/bootblock_common.h +++ b/src/include/bootblock_common.h @@ -38,6 +38,9 @@ asmlinkage void bootblock_c_entry(uint64_t base_timestamp); asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist);
+/* To be used when APs execute through bootblock too. */ +asmlinkage void ap_bootblock_c_entry(void); + void bootblock_main_with_basetime(uint64_t base_timestamp);
/* This is the argument structure passed from decompressor to bootblock. */ diff --git a/src/include/cpu/amd/car.h b/src/include/cpu/amd/car.h deleted file mode 100644 index f57ea82..0000000 --- a/src/include/cpu/amd/car.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef _CPU_AMD_CAR_H -#define _CPU_AMD_CAR_H - -#include <arch/cpu.h> - -asmlinkage void romstage_main(unsigned long bist); -asmlinkage void ap_romstage_main(void); - -#endif
-
Angel Pons (Code Review) -
Kyösti Mälkki (Code Review)
-
Michał Żygowski (Code Review)