Change in coreboot[master]: soc/intel/alderlake: Use PMC IPC to disable HECI1

[Subrata Banik (Code Review)]

Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Angel Pons, Nick Vaccaro, Patrick Rudolph, EricR Lai.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61458 )

Change subject: soc/intel/alderlake: Use PMC IPC to disable HECI1
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Patch Set 7:

(1 comment)

File src/soc/intel/alderlake/Kconfig:

https://review.coreboot.org/c/coreboot/+/61458/comment/c09173f6_b119f0d9 
PS7, Line 81: 	select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC if DISABLE_HECI1_AT_PRE_BOOT
> I think this is correct; the mainboard developer selects DISABLE_HECI1 or not; and the SoC code "kno […]

Yup, this basically defines the relation between wish to disable HECI1 and what interface to use.

@Eric, I hope you are good?