Change in coreboot[master]: nb/intel/gm45: Set display backlight according to EDID string
Arthur Heymans has uploaded a new change for review. ( https://review.coreboot.org/19500 )
Change subject: nb/intel/gm45: Set display backlight according to EDID string ......................................................................
nb/intel/gm45: Set display backlight according to EDID string
Add some known good values for some thinkpads displays.
Known good means that at this pwm frequency the display is evenly lit on all duty cycles, the display makes minimal to no noise at lower duty cycles and the display does not flicker. This values differs from vendor (which uses an obviously wrong display clock (190MHz instead of 320MHz) resulting in frequency more than 60% off the intended value.
Change-Id: Id7bc0d453fac31e806852206ba2c895720b2c843 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/drivers/intel/gma/edid.h M src/lib/edid.c M src/mainboard/lenovo/t400/Makefile.inc A src/mainboard/lenovo/t400/blc.c M src/mainboard/lenovo/x200/Makefile.inc A src/mainboard/lenovo/x200/blc.c M src/mainboard/roda/rk9/Makefile.inc A src/mainboard/roda/rk9/blc.c M src/northbridge/intel/gm45/gma.c 9 files changed, 142 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/19500/1
diff --git a/src/drivers/intel/gma/edid.h b/src/drivers/intel/gma/edid.h index d8214cf..ff5f40e 100644 --- a/src/drivers/intel/gma/edid.h +++ b/src/drivers/intel/gma/edid.h @@ -1,2 +1,9 @@ void intel_gmbus_read_edid(u8 *gmbus_mmio, u8 bus, u8 slave, u8 *edid, u32 edid_size); void intel_gmbus_stop(u8 *gmbus_mmio); +typedef struct { + char ascii_string[13]; + int pwm_freq; /* In Hz */ +} blc_pwm_t ; +int get_blc_values(blc_pwm_t **entries); + + diff --git a/src/lib/edid.c b/src/lib/edid.c index 43449d9..6dd928b 100644 --- a/src/lib/edid.c +++ b/src/lib/edid.c @@ -1481,7 +1481,6 @@ c.nonconformant_extension += parse_extension(out, &edid[i], &c);
- printk(BIOS_DEBUG,"ASCII string: %s\n", out->ascii_string); if (c.claims_one_point_four) { if (c.nonconformant_digital_display || !c.has_valid_string_termination || diff --git a/src/mainboard/lenovo/t400/Makefile.inc b/src/mainboard/lenovo/t400/Makefile.inc index 3aa94b5..8ac61bb 100644 --- a/src/mainboard/lenovo/t400/Makefile.inc +++ b/src/mainboard/lenovo/t400/Makefile.inc @@ -18,3 +18,4 @@ ramstage-y += dock.c ramstage-y += cstates.c romstage-y += hybrid_graphics.c +ramstage-y += blc.c diff --git a/src/mainboard/lenovo/t400/blc.c b/src/mainboard/lenovo/t400/blc.c new file mode 100644 index 0000000..a270007 --- /dev/null +++ b/src/mainboard/lenovo/t400/blc.c @@ -0,0 +1,38 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 arthur@aheymans.xyz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <commonlib/helpers.h> +#include <drivers/intel/gma/edid.h> + +static blc_pwm_t blc_entries[] = { + /* Vendor bios seems intends to PWM freq set 220Hz */ + /* T400 */ + {"B141EW04 V7 ", 110}, + {"LP141WX3-TLR1", 110}, + {"LP141WX5-TLP2", 450}, + {"LTN141AT12401", 450}, + {"LTN141W1-L05", 110}, + {"LTN141WD-L05", 110}, + /* T500 */ + {"LP154W02-TL06", 110}, + {"LTN154P3-L02", 110}, +}; + +int get_blc_values(blc_pwm_t **entries) +{ + *entries = blc_entries; + return ARRAY_SIZE(blc_entries); +} diff --git a/src/mainboard/lenovo/x200/Makefile.inc b/src/mainboard/lenovo/x200/Makefile.inc index b382efb..c16aa6a 100644 --- a/src/mainboard/lenovo/x200/Makefile.inc +++ b/src/mainboard/lenovo/x200/Makefile.inc @@ -15,3 +15,4 @@
ramstage-y += dock.c ramstage-y += cstates.c +ramstage-y += blc.c \ No newline at end of file diff --git a/src/mainboard/lenovo/x200/blc.c b/src/mainboard/lenovo/x200/blc.c new file mode 100644 index 0000000..77bc383 --- /dev/null +++ b/src/mainboard/lenovo/x200/blc.c @@ -0,0 +1,40 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 arthur@aheymans.xyz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <commonlib/helpers.h> +#include <drivers/intel/gma/edid.h> + +static blc_pwm_t blc_entries[] = { + {"LTD121EWVB", 165}, + {"B121EW03 V6 ", 165}, + {"B121EW09 V3 ", 450}, + {"HV121WX4-120", 110}, /* Aftermarket AFFS lcd, works well at low pwm */ + {"LTN121AT03001", 110}, + {"LTN121AP03001", 750}, + /* TODO: from thinkwiki, untested, generally CCFL run best at lower PWM */ + /* {"B121EW09 V2 ", 450}, */ + /* {"N121IB-L05", 450}, */ + /* {"LP121WX3-TLC1" 450}, */ + /* {"LP121WX3-TLA1" 450}, */ + /* {"B121EW03 V3 " 110}, */ + /* {"LTN121AP02001" 110}, */ +}; + +int get_blc_values(blc_pwm_t **entries) +{ + *entries = blc_entries; + return ARRAY_SIZE(blc_entries); +} diff --git a/src/mainboard/roda/rk9/Makefile.inc b/src/mainboard/roda/rk9/Makefile.inc index 5a16ed8..f92382e 100644 --- a/src/mainboard/roda/rk9/Makefile.inc +++ b/src/mainboard/roda/rk9/Makefile.inc @@ -15,3 +15,4 @@
ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += ti_pci7xx1.c ramstage-y += cstates.c +ramstage-y += blc.c diff --git a/src/mainboard/roda/rk9/blc.c b/src/mainboard/roda/rk9/blc.c new file mode 100644 index 0000000..63bf632 --- /dev/null +++ b/src/mainboard/roda/rk9/blc.c @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 arthur@aheymans.xyz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <commonlib/helpers.h> +#include <drivers/intel/gma/edid.h> + +static blc_pwm_t blc_entries[] = { }; + +int get_blc_values(blc_pwm_t **entries) +{ + *entries = blc_entries; + return ARRAY_SIZE(blc_entries); +} diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index be0c077..e24fa51 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -609,12 +609,17 @@ return (blc_mod << 16) | blc_mod; }
-static void gma_pm_init_post_vbios(struct device *const dev) +static void gma_pm_init_post_vbios(struct device *const dev, + const char *ascii_sting) { const struct northbridge_intel_gm45_config *const conf = dev->chip_info;
u32 reg32; u8 reg8; + blc_pwm_t *blc_pwm; + int blc_array_len, i; + u16 pwm_freq = 0; + u8 found_edid = 0;
/* Setup Panel Power On Delays */ reg32 = gtt_read(PP_ON_DELAYS); @@ -645,11 +650,29 @@ reg8 = 100; if (conf->duty_cycle != 0) reg8 = conf->duty_cycle; - if (conf->pwm_freq == 0) + blc_array_len = get_blc_values(&blc_pwm); + if (conf->pwm_freq != 0) + pwm_freq = conf->pwm_freq; + + /* Find EDID string and pwm freq in lookup table */ + for (i = 0; i < blc_array_len; i++) { + if (!strncmp(blc_pwm[i].ascii_string, ascii_sting, + strlen(blc_pwm[i].ascii_string))) { + pwm_freq = blc_pwm[i].pwm_freq; + printk(BIOS_DEBUG, "Found EDID string: %s in lookup table, pwm: %dHz\n", + blc_pwm[i].ascii_string ,pwm_freq); + found_edid = 1; + break; + } + } + if (!found_edid) + printk(BIOS_DEBUG, "EDID string not found in lookup table, please report.\n"); + + if (pwm_freq == 0) gtt_write(BLC_PWM_CTL, 0x06100610); else - gtt_write(BLC_PWM_CTL, freq_to_blc_pwm_ctl(dev, - conf->pwm_freq, reg8)); + gtt_write(BLC_PWM_CTL, freq_to_blc_pwm_ctl(dev, pwm_freq, + reg8)); }
static void gma_func0_init(struct device *dev) @@ -692,7 +715,7 @@ sizeof(edid_data_vga), &edid_vga);
/* Post VBIOS init */ - gma_pm_init_post_vbios(dev); + gma_pm_init_post_vbios(dev, edid_lvds.ascii_string);
if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) { u32 physbase;
-
Arthur Heymans (Code Review)