Change in coreboot[master]: mb/google/kahlee: Correct bad gpio entry

[Justin TerAvest (Code Review)]

Justin TerAvest has uploaded this change for review. ( https://review.coreboot.org/23829

Change subject: mb/google/kahlee: Correct bad gpio entry
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mb/google/kahlee: Correct bad gpio entry

There's no need to set the output enable here; this is already handled
by the native function. I'm making this correction in this change to
prevent the GPIO pin descriptions from getting confusing.

BUG=b:72875858
TEST=Booted, confirmed S5_MUX_CTRL high with and without this change.

Change-Id: I9e047be7169586c59892ef2bdab915683feeebda
Signed-off-by: Justin TerAvest 
---
M src/mainboard/google/kahlee/variants/baseboard/gpio.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/23829/1

diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c
index 1e1f34b..fb7ae96 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c
+++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c
@@ -91,7 +91,7 @@
    { GPIO_40, Function0, OUTPUT_H },

/* GPIO_42 - S5_MUX_CTRL */
-	{ GPIO_42, Function0, OUTPUT_H },
+	{ GPIO_42, Function0, INPUT },

/* GPIO_70 - WLAN_PE_RST_L */
    { GPIO_70, Function0, OUTPUT_H },