Change in coreboot[master]: drivers/intel/fsp2_0: Allow larger FSPS UPD than expected in coreboot

[Nikolai Vyssotski (Code Review)]

Nikolai Vyssotski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50576 )

Change subject: drivers/intel/fsp2_0: Allow larger FSPS UPD than expected in coreboot
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drivers/intel/fsp2_0: Allow larger FSPS UPD than expected in coreboot

Enforcing exact match of FSPS UPD block size between FSP and coreboot
mandates simultaneous updates to coreboot and FSP repos. Allow coreboot
to proceed if its UPD structure is smaller than FSP one. This usually
indicates that FSP has an updated UPD structure which should be soon
matched/updated on the coreboot side to keep them in sync.

BUG=b:171234996
BRANCH=Zork
TEST=build Trembyle

Change-Id: I557fd3a1f208b5b444ccf76e1552e74ecf4decad
Signed-off-by: Nikolai Vyssotski 
---
M src/drivers/intel/fsp2_0/silicon_init.c
1 file changed, 3 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/50576/1

diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 6a2a73d..330fb82 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -94,9 +94,11 @@
     * choices for coreboot, and different sized UPD from what the region
     * allows is potentially a build problem.
     */
-	if (!hdr->cfg_region_size || hdr->cfg_region_size != sizeof(FSPS_UPD))
+	if (!hdr->cfg_region_size || hdr->cfg_region_size < sizeof(FSPS_UPD))
    	die_with_post_code(POST_INVALID_VENDOR_BINARY,
    		"Invalid FSPS UPD region\n");
+	else if (hdr->cfg_region_size > sizeof(FSPS_UPD))
+		printk(BIOS_WARNING, "FSP and coreboot are out of sync. FSPS UPD size > coreboot\n");

upd = xmalloc(hdr->cfg_region_size);