Change in coreboot[master]: soc/amd/sabrina/makefile: drop multilevel option in amdfwtool calls

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63235 )

Change subject: soc/amd/sabrina/makefile: drop multilevel option in amdfwtool calls
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soc/amd/sabrina/makefile: drop multilevel option in amdfwtool calls

Since Sabrina uses the image slot header (ISH) that depends on the AMD
A/B recovery scheme that depends on the multi-level PSP directory
support, the multi-level support gets automatically selected by passing
Sabrina as SoC name to amdfwtool, so passing the --multilevel command
line switch to amdfwtool isn't needed.

TEST=Timeless build results in identical binary for chausie

Signed-off-by: Felix Held 
Change-Id: I98154d5b47daca6ae7952ffd3175d98ea3e01845
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63235
Tested-by: build bot (Jenkins) 
Reviewed-by: Raul Rangel 
Reviewed-by: Paul Menzel 
---
M src/soc/amd/sabrina/Makefile.inc
1 file changed, 0 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Raul Rangel: Looks good to me, approved

diff --git a/src/soc/amd/sabrina/Makefile.inc b/src/soc/amd/sabrina/Makefile.inc
index b504589..b7b538e 100644
--- a/src/soc/amd/sabrina/Makefile.inc
+++ b/src/soc/amd/sabrina/Makefile.inc
@@ -232,7 +232,6 @@
    	$(OPT_VERSTAGE_FILE) \
    	$(OPT_VERSTAGE_SIG_FILE) \
    	--location $(shell printf "%#x" $(SABRINA_FWM_POSITION)) \
-		--multilevel \
    	--output $@

$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
@@ -250,7 +249,6 @@
    	$(OPT_APOB_NV_BASE) \
    	--location $(shell printf "%#x" $(SABRINA_FW_A_POSITION)) \
    	--anywhere \
-		--multilevel \
    	--output $@

$(obj)/amdfw_b.rom: $(obj)/amdfw.rom
@@ -262,7 +260,6 @@
    	$(OPT_APOB_NV_BASE) \
    	--location $(shell printf "%#x" $(SABRINA_FW_B_POSITION)) \
    	--anywhere \
-		--multilevel \
    	--output $@