Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57755 )
Change subject: [WIP]: Cache ext BIOS window as CBFS read is pointing this range ......................................................................
[WIP]: Cache ext BIOS window as CBFS read is pointing this range
Change-Id: I30aa96382f2627068d904725de777d93754f2b39 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/arch/x86/include/arch/romstage.h M src/arch/x86/postcar_loader.c 2 files changed, 15 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/57755/1
diff --git a/src/arch/x86/include/arch/romstage.h b/src/arch/x86/include/arch/romstage.h index 28d29bf..1741923 100644 --- a/src/arch/x86/include/arch/romstage.h +++ b/src/arch/x86/include/arch/romstage.h @@ -39,6 +39,8 @@ */ void postcar_frame_add_romcache(struct postcar_frame *pcf, int type);
+void postcar_frame_add_extwindow_cache(struct postcar_frame *pcf, int type); + /* * fill_postcar_frame() is called after raminit completes and right before * calling run_postcar_phase(). Implementation should call postcar_frame_add_mtrr() diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c index 8a5f902..0552404 100644 --- a/src/arch/x86/postcar_loader.c +++ b/src/arch/x86/postcar_loader.c @@ -74,11 +74,18 @@ var_mtrr_set_with_cb(&pcf->ctx, addr, size, type, postcar_var_mtrr_set); }
+void postcar_frame_add_extwindow_cache(struct postcar_frame *pcf, int type) +{ + if (!CONFIG(FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW)) + return; + postcar_frame_add_mtrr(pcf, EXT_BIOS_WIN_BASE, EXT_BIOS_WIN_SIZE, type); +} + void postcar_frame_add_romcache(struct postcar_frame *pcf, int type) { - if (!CONFIG(BOOT_DEVICE_MEMORY_MAPPED)) - return; - postcar_frame_add_mtrr(pcf, CACHE_ROM_BASE, CACHE_ROM_SIZE, type); + if (!CONFIG(BOOT_DEVICE_MEMORY_MAPPED)) + return; + postcar_frame_add_mtrr(pcf, CACHE_ROM_BASE, CACHE_ROM_SIZE, type); }
static void postcar_frame_common_mtrrs(struct postcar_frame *pcf) @@ -88,6 +95,9 @@
/* Cache the ROM as WP just below 4GiB. */ postcar_frame_add_romcache(pcf, MTRR_TYPE_WRPROT); + + /* Cache the ext BIOS windows */ + postcar_frame_add_extwindow_cache(pcf, MTRR_TYPE_WRPROT); }
/* prepare_and_run_postcar() determines the stack to use after