[M] Change in coreboot[main]: soc/intel: Assert if `pmc_/gpe0_dwX` values are not unique

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/85161?usp=email )

Change subject: soc/intel: Assert if `pmc_/gpe0_dwX` values are not unique
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Patch Set 5:

(1 comment)

Patchset:

PS5:
> > HI Matt,
> >
> > Can you help me understand how this affects you? If, as you say, lots of devices are failing due to static assertions, why did the build-bots mark this CL as V+1? Shouldn't a static assertion cause the build to fail?
> >
> > Suggestion, if you are thinking avoiding assertion check for undeclared GPE (with default value 0) is good enough ? But note, as per GPE PMC description, zero is also a valid GPE group assignment.
>
> It's manifesting as a run-time assertion for me - as an example, the starlabs/byte-adl doesn't define any GPE routes, builds fine, but boots/halts when the check is called at the end of ramstage. I scanned the tree and found a handful of other ADL-N boards which likewise did not define any GPE routes.
>
> I think we could skip the assertion if dw0 == dw1 == dw2 == 0, and that would resolve the issue

Yes, this is an option for sure but this is still a W/A because 0 means some GPIO community as well that you are programming as Tire-1 GPE. So, each DWORD register sets the 0 values means all GPE will be masked.