Mariusz Szafranski has uploaded this change for review. ( https://review.coreboot.org/20861
Change subject: soc/intel/denverton_ns: Add support for Denverton_NS SoC ......................................................................
soc/intel/denverton_ns: Add support for Denverton_NS SoC
This change adds support for Intel Denverton_NS SoC. Code is based partially on Apollolake/Skylake code.
Change-Id: I53d69aede3b92f1fe06b74a96cc40187fb9825f1 Signed-off-by: Mariusz Szafranski mariuszx.szafranski@intel.com --- A src/soc/intel/denverton_ns/Kconfig A src/soc/intel/denverton_ns/Makefile.inc A src/soc/intel/denverton_ns/acpi.c A src/soc/intel/denverton_ns/acpi/cpu.asl A src/soc/intel/denverton_ns/acpi/globalnvs.asl A src/soc/intel/denverton_ns/acpi/irqlinks.asl A src/soc/intel/denverton_ns/acpi/lpc.asl A src/soc/intel/denverton_ns/acpi/northcluster.asl A src/soc/intel/denverton_ns/acpi/npk.asl A src/soc/intel/denverton_ns/acpi/pcie.asl A src/soc/intel/denverton_ns/acpi/pcie_port.asl A src/soc/intel/denverton_ns/acpi/pmc.asl A src/soc/intel/denverton_ns/acpi/sata.asl A src/soc/intel/denverton_ns/acpi/sata2.asl A src/soc/intel/denverton_ns/acpi/sleepstates.asl A src/soc/intel/denverton_ns/acpi/smbus.asl A src/soc/intel/denverton_ns/acpi/smbus2.asl A src/soc/intel/denverton_ns/acpi/southcluster.asl A src/soc/intel/denverton_ns/acpi/xhci.asl A src/soc/intel/denverton_ns/bootblock/bootblock.c A src/soc/intel/denverton_ns/bootblock/cache_as_ram_fsp.S A src/soc/intel/denverton_ns/bootblock/uart.c A src/soc/intel/denverton_ns/chip.c A src/soc/intel/denverton_ns/chip.h A src/soc/intel/denverton_ns/cpu.c A src/soc/intel/denverton_ns/csme_ie_kt.c A src/soc/intel/denverton_ns/exit_car_fsp.S A src/soc/intel/denverton_ns/fiamux.c A src/soc/intel/denverton_ns/gpio.c A src/soc/intel/denverton_ns/hob_display.c A src/soc/intel/denverton_ns/include/soc/acpi.h A src/soc/intel/denverton_ns/include/soc/bootblock.h A src/soc/intel/denverton_ns/include/soc/cpu.h A src/soc/intel/denverton_ns/include/soc/fiamux.h A src/soc/intel/denverton_ns/include/soc/gpio.h A src/soc/intel/denverton_ns/include/soc/gpio_defs.h A src/soc/intel/denverton_ns/include/soc/iomap.h A src/soc/intel/denverton_ns/include/soc/lpc.h A src/soc/intel/denverton_ns/include/soc/msr.h A src/soc/intel/denverton_ns/include/soc/nvs.h A src/soc/intel/denverton_ns/include/soc/p2sb.h A src/soc/intel/denverton_ns/include/soc/pattrs.h A src/soc/intel/denverton_ns/include/soc/pci_devs.h A src/soc/intel/denverton_ns/include/soc/pcr.h A src/soc/intel/denverton_ns/include/soc/pm.h A src/soc/intel/denverton_ns/include/soc/pmc.h A src/soc/intel/denverton_ns/include/soc/ramstage.h A src/soc/intel/denverton_ns/include/soc/romstage.h A src/soc/intel/denverton_ns/include/soc/sata.h A src/soc/intel/denverton_ns/include/soc/smbus.h A src/soc/intel/denverton_ns/include/soc/smm.h A src/soc/intel/denverton_ns/include/soc/soc_util.h A src/soc/intel/denverton_ns/include/soc/systemagent.h A src/soc/intel/denverton_ns/include/soc/uart.h A src/soc/intel/denverton_ns/lpc.c A src/soc/intel/denverton_ns/memmap.c A src/soc/intel/denverton_ns/npk.c A src/soc/intel/denverton_ns/pmc.c A src/soc/intel/denverton_ns/pmutil.c A src/soc/intel/denverton_ns/reset.c A src/soc/intel/denverton_ns/romstage.c A src/soc/intel/denverton_ns/sata.c A src/soc/intel/denverton_ns/smihandler.c A src/soc/intel/denverton_ns/smm.c A src/soc/intel/denverton_ns/soc_util.c A src/soc/intel/denverton_ns/spi.c A src/soc/intel/denverton_ns/systemagent.c A src/soc/intel/denverton_ns/tsc_freq.c A src/soc/intel/denverton_ns/uart.c A src/soc/intel/denverton_ns/uart_debug.c A src/soc/intel/denverton_ns/upd_display.c A src/soc/intel/denverton_ns/xhci.c 72 files changed, 9,501 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/20861/1
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Mariusz Szafranski (Code Review)