New patch to review for coreboot: 2fe6007 verstage should include the CBFS SPI wrapper, when configured

[Patrick Georgi]

Patrick Georgi ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8772

-gerrit

commit 2fe6007e605410fbd4dd88bbb72573ea45512db9
Author: Vadim Bendebury 
Date:   Thu Oct 16 11:24:12 2014 -0700

verstage should include the CBFS SPI wrapper, when configured

Vboot2 targets so far did not have COMMON_CBFS_SPI_WRAPPER
    configuration option enabled, so the verstage is missing the relevant
    files in some Makefiles. This patch fixes the problem.

BRANCH=none
    BUG=none
    TEST=with the rest of the patches applied cosmos target builds fine
         with COMMON_CBFS_SPI_WRAPPER enabled

Change-Id: I3ce78c8afc5f7d8ce822bbf8dd789c0c2ba4b99c
    Signed-off-by: Patrick Georgi 
    Original-Commit-Id: b72693c96f7d8ce94ce6fe12b316d5b88fded579
    Original-Change-Id: Iab813b9f5b0156c45b007fe175500ef0de50e65c
    Original-Signed-off-by: Vadim Bendebury 
    Original-Reviewed-on: https://chromium-review.googlesource.com/223751
    Original-Reviewed-by: Aaron Durbin 
---
 src/drivers/spi/Makefile.inc | 11 +++++++++++
 src/lib/Makefile.inc         |  3 +++
 2 files changed, 14 insertions(+)

diff --git a/src/drivers/spi/Makefile.inc b/src/drivers/spi/Makefile.inc
index 1bada79..ade34a2 100644
--- a/src/drivers/spi/Makefile.inc
+++ b/src/drivers/spi/Makefile.inc
@@ -20,6 +20,17 @@ romstage-$(CONFIG_SPI_FLASH_SST) += sst.c
 romstage-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.c
 romstage-$(CONFIG_SPI_FLASH_WINBOND) += winbond.c
 romstage-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c
+
+verstage-$(CONFIG_SPI_FLASH) += spi_flash.c
+verstage-$(CONFIG_SPI_FLASH_EON) += eon.c
+verstage-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.c
+verstage-$(CONFIG_SPI_FLASH_MACRONIX) += macronix.c
+verstage-$(CONFIG_SPI_FLASH_SPANSION) += spansion.c
+verstage-$(CONFIG_SPI_FLASH_SST) += sst.c
+verstage-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.c
+verstage-$(CONFIG_SPI_FLASH_WINBOND) += winbond.c
+verstage-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c
+
 endif

ramstage-$(CONFIG_SPI_FLASH) += spi_flash.c
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index e599066..d1e3a92 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -29,6 +29,9 @@ verstage-y += delay.c
 verstage-y += cbfs.c
 verstage-y += memcmp.c
 verstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
+verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
+verstage-y += tlcl.c
+verstage-$(CONFIG_GENERIC_UDELAY) += timer.c

romstage-y += memchr.c