Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46642 )
Change subject: soc/intel/denverton_ns: Add PCH_DEVFN_PMC for finding PMC device ......................................................................
soc/intel/denverton_ns: Add PCH_DEVFN_PMC for finding PMC device
In order to support the common PMC functions this device needs to be able to be located with the common lookup macro.
BUG=b:160996445 TEST=build intel/harcuvar board
Change-Id: If04a82582c07c15bf841d0baa84e31561d211502 Signed-off-by: Duncan Laurie dlaurie@google.com --- M src/soc/intel/denverton_ns/include/soc/pci_devs.h 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/46642/1
diff --git a/src/soc/intel/denverton_ns/include/soc/pci_devs.h b/src/soc/intel/denverton_ns/include/soc/pci_devs.h index ba251a8..b6bac0b 100644 --- a/src/soc/intel/denverton_ns/include/soc/pci_devs.h +++ b/src/soc/intel/denverton_ns/include/soc/pci_devs.h @@ -138,6 +138,7 @@
#define PCH_DEV_SLOT_LPC 0x1f #define PCH_DEVFN_LPC _PCH_DEVFN(LPC, 0) +#define PCH_DEVFN_PMC _PCH_DEVFN(LPC, 2) #define PCH_DEVFN_SPI _PCH_DEVFN(LPC, 5) #define PCH_DEV_LPC _PCH_DEV(LPC, 0) #define PCH_DEV_SPI _PCH_DEV(LPC, 5)
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46642 )
Change subject: soc/intel/denverton_ns: Add PCH_DEVFN_PMC for finding PMC device ......................................................................
Patch Set 4: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46642 )
Change subject: soc/intel/denverton_ns: Add PCH_DEVFN_PMC for finding PMC device ......................................................................
soc/intel/denverton_ns: Add PCH_DEVFN_PMC for finding PMC device
In order to support the common PMC functions this device needs to be able to be located with the common lookup macro.
BUG=b:160996445 TEST=build intel/harcuvar board
Change-Id: If04a82582c07c15bf841d0baa84e31561d211502 Signed-off-by: Duncan Laurie dlaurie@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46642 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/denverton_ns/include/soc/pci_devs.h 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/intel/denverton_ns/include/soc/pci_devs.h b/src/soc/intel/denverton_ns/include/soc/pci_devs.h index ba251a8..b6bac0b 100644 --- a/src/soc/intel/denverton_ns/include/soc/pci_devs.h +++ b/src/soc/intel/denverton_ns/include/soc/pci_devs.h @@ -138,6 +138,7 @@
#define PCH_DEV_SLOT_LPC 0x1f #define PCH_DEVFN_LPC _PCH_DEVFN(LPC, 0) +#define PCH_DEVFN_PMC _PCH_DEVFN(LPC, 2) #define PCH_DEVFN_SPI _PCH_DEVFN(LPC, 5) #define PCH_DEV_LPC _PCH_DEV(LPC, 0) #define PCH_DEV_SPI _PCH_DEV(LPC, 5)