Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 2 and 3 ......................................................................
mb/google/zork: Disable UART 2 and 3
We don't use these on zork, so lets save the power.
BUG=b:153001807 TEST=Boot OS and make sure UART2 and 3 are not probed and remain powered off.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I2fadeba779b66ec2fb13951b9487118ef0737a94 --- M src/mainboard/google/zork/variants/baseboard/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/42328/1
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree.cb b/src/mainboard/google/zork/variants/baseboard/devicetree.cb index 664e379..fc33f62 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree.cb @@ -187,4 +187,7 @@ end end
+ device mmio 0xfedce000 off end # UART2 + device mmio 0xfedcf000 off end # UART3 + end # chip soc/amd/picasso
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 2 and 3 ......................................................................
Patch Set 1: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 2 and 3 ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42328/1/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/42328/1/src/mainboard/google/zork/v... PS1, Line 189: Should there be entries for UART0 and UART1 being set to on?
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 2 and 3 ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42328/1/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/42328/1/src/mainboard/google/zork/v... PS1, Line 189:
Should there be entries for UART0 and UART1 being set to on?
If I set something off here, and the override tree sets it to on, is the final value on? I want to set UART1 as off, an only have morphius and woomax enable it.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 2 and 3 ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42328/1/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/42328/1/src/mainboard/google/zork/v... PS1, Line 189:
If I set something off here, and the override tree sets it to on, is the final value on? I want to s […]
Yes, if you set device to `off` here and `on` in overridetree.cb then the final result would be `on` for the variants using the overrridetree.cb and `off` for others.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 2 and 3 ......................................................................
Uploaded patch set 2.
Hello build bot (Jenkins), Furquan Shaikh, Aaron Durbin, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42328
to look at the new patch set (#2).
Change subject: mb/google/zork: Disable UART 2 and 3 ......................................................................
mb/google/zork: Disable UART 2 and 3
We don't use these on zork, so lets save the power.
BUG=b:153001807 TEST=Boot OS and make sure UART2 and 3 are not probed and remain powered off.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I2fadeba779b66ec2fb13951b9487118ef0737a94 --- M src/mainboard/google/zork/variants/baseboard/devicetree.cb 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/42328/2
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 2 and 3 ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/42328/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42328/2//COMMIT_MSG@7 PS2, Line 7: 2 and 3 1-3
https://review.coreboot.org/c/coreboot/+/42328/2//COMMIT_MSG@12 PS2, Line 12: 2 and 3 same
Hello build bot (Jenkins), Furquan Shaikh, Aaron Durbin, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42328
to look at the new patch set (#3).
Change subject: mb/google/zork: Disable UART 1, 2 and 3 ......................................................................
mb/google/zork: Disable UART 1, 2 and 3
We don't use these on zork, so lets save the power.
BUG=b:153001807 TEST=Boot OS and make sure UART 1,2 and 3 are not probed and remain powered off.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I2fadeba779b66ec2fb13951b9487118ef0737a94 --- M src/mainboard/google/zork/variants/baseboard/devicetree.cb 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/42328/3
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 1, 2 and 3 ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/42328/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42328/2//COMMIT_MSG@7 PS2, Line 7: 2 and 3
1-3
Done
https://review.coreboot.org/c/coreboot/+/42328/2//COMMIT_MSG@12 PS2, Line 12: 2 and 3
same
Done
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 1, 2 and 3 ......................................................................
Patch Set 3: Code-Review+2
build failure seems to be a flake in sharedutils.
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 1, 2 and 3 ......................................................................
Patch Set 3: Code-Review+2
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 1, 2 and 3 ......................................................................
Patch Set 3:
Patch Set 3: Code-Review+2
build failure seems to be a flake in sharedutils.
Can I make Jenkins rerun without reuploading?
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 1, 2 and 3 ......................................................................
Patch Set 3:
Patch Set 3:
Patch Set 3: Code-Review+2
build failure seems to be a flake in sharedutils.
Can I make Jenkins rerun without reuploading?
It's possible. However, I don't know how nor do I know if I have the permissions to trigger a rebuild. I usually just rebase to kick off another build.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 1, 2 and 3 ......................................................................
Patch Set 3:
doing a rebase should just do the trick; if it's a clean rebase you shouldn't loose the +2
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 1, 2 and 3 ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42328/1/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/42328/1/src/mainboard/google/zork/v... PS1, Line 189:
Yes, if you set device to `off` here and `on` in overridetree. […]
Done
Hello build bot (Jenkins), Furquan Shaikh, Marshall Dawson, Aaron Durbin, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42328
to look at the new patch set (#4).
Change subject: mb/google/zork: Disable UART 1, 2 and 3 ......................................................................
mb/google/zork: Disable UART 1, 2 and 3
We don't use these on zork, so lets save the power.
BUG=b:153001807 TEST=Boot OS and make sure UART 1, 2 and 3 are not probed and remain powered off.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I2fadeba779b66ec2fb13951b9487118ef0737a94 --- M src/mainboard/google/zork/variants/baseboard/devicetree.cb 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/42328/4
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 1, 2 and 3 ......................................................................
Patch Set 4: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42328 )
Change subject: mb/google/zork: Disable UART 1, 2 and 3 ......................................................................
mb/google/zork: Disable UART 1, 2 and 3
We don't use these on zork, so lets save the power.
BUG=b:153001807 TEST=Boot OS and make sure UART 1, 2 and 3 are not probed and remain powered off.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I2fadeba779b66ec2fb13951b9487118ef0737a94 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42328 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aaron Durbin adurbin@chromium.org --- M src/mainboard/google/zork/variants/baseboard/devicetree.cb 1 file changed, 4 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree.cb b/src/mainboard/google/zork/variants/baseboard/devicetree.cb index 664e379..18c3783 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree.cb @@ -187,4 +187,8 @@ end end
+ device mmio 0xfedca000 off end # UART1 + device mmio 0xfedce000 off end # UART2 + device mmio 0xfedcf000 off end # UART3 + end # chip soc/amd/picasso
-
Aaron Durbin (Code Review) -
Felix Held (Code Review)
-
Furquan Shaikh (Code Review)
-
Marshall Dawson (Code Review)
-
Raul Rangel (Code Review)