Change in coreboot[master]: soc/intel/tigerlake: Define soc_get_pcie_rp_type - coreboot-gerrit

3 Dec 2021


      Attention is currently required from: Subrata Banik, Patrick Rudolph.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59853 )
Change subject: soc/intel/tigerlake: Define soc_get_pcie_rp_type
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Patch Set 4:
(1 comment)
File src/soc/intel/common/block/include/intelblocks/pcie_rp.h:
https://review.coreboot.org/c/coreboot/+/59853/comment/56d2d530_18782b14 
PS3, Line 120: /*For PCIe RTD3 support, each SoC that uses it must implement this function. */
...
@Tim, one space after `/*`
Done
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic3f7d3f2fc12ae2b53604cd8f8b694a7674c3620
Gerrit-Change-Number: 59853
Gerrit-PatchSet: 4
Gerrit-Owner: Tim Wawrzynczak twawrzynczak@chromium.org
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
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