Naresh Solanki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/87214?usp=email )
Change subject: src/soc/amd/* : Move CPU init in common code ......................................................................
src/soc/amd/* : Move CPU init in common code
AMD SoC from family 17h share common cpu init code. Move those to common/block/cpu/noncar/cpu.c
TEST=Build for glinda SoC & check for boot.
Change-Id: If53455f359302f368f7c979defa2c1088c5c2f16 Signed-off-by: Naresh Solanki naresh.solanki@9elements.com --- M src/soc/amd/cezanne/cpu.c M src/soc/amd/common/block/cpu/noncar/cpu.c M src/soc/amd/common/block/include/amdblocks/cpu.h M src/soc/amd/genoa_poc/cpu.c M src/soc/amd/glinda/cpu.c M src/soc/amd/mendocino/cpu.c M src/soc/amd/phoenix/cpu.c 7 files changed, 19 insertions(+), 45 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/87214/1
diff --git a/src/soc/amd/cezanne/cpu.c b/src/soc/amd/cezanne/cpu.c index 4f39aef..70aa191 100644 --- a/src/soc/amd/cezanne/cpu.c +++ b/src/soc/amd/cezanne/cpu.c @@ -10,16 +10,8 @@ _Static_assert(CONFIG_MAX_CPUS == 16, "Do not override MAX_CPUS. To reduce the number of " "available cores, use the downcore_mode and disable_smt devicetree settings instead.");
-static void zen_2_3_init(struct device *dev) -{ - check_mca(); - set_cstate_io_addr(); - - amd_apply_microcode_patch(); -} - static struct device_operations cpu_dev_ops = { - .init = zen_2_3_init, + .init = amd_cpu_init, };
static struct cpu_device_id cpu_table[] = { diff --git a/src/soc/amd/common/block/cpu/noncar/cpu.c b/src/soc/amd/common/block/cpu/noncar/cpu.c index e67d669..c97e2f4 100644 --- a/src/soc/amd/common/block/cpu/noncar/cpu.c +++ b/src/soc/amd/common/block/cpu/noncar/cpu.c @@ -1,10 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/cpu.h> +#include <amdblocks/mca.h> #include <arch/cpuid.h> #include <cpu/cpu.h> #include <cpu/x86/msr.h> #include <cpu/amd/cpuid.h> +#include <cpu/amd/microcode.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> #include <smbios.h> @@ -100,3 +102,14 @@ return (cpuid_ebx(CPUID_EBX_MEM_ENCRYPT) & CPUID_EBX_MEM_ENCRYPT_ADDR_BITS_MASK) >> CPUID_EBX_MEM_ENCRYPT_ADDR_BITS_SHIFT; } + +void amd_cpu_init(struct device *dev) +{ + if (CONFIG(SOC_AMD_COMMON_BLOCK_MCA_COMMON)) + check_mca(); + + set_cstate_io_addr(); + + if (CONFIG(SOC_AMD_COMMON_BLOCK_UCODE)) + amd_apply_microcode_patch(); +} diff --git a/src/soc/amd/common/block/include/amdblocks/cpu.h b/src/soc/amd/common/block/include/amdblocks/cpu.h index 4aa225b..ce0b2da 100644 --- a/src/soc/amd/common/block/include/amdblocks/cpu.h +++ b/src/soc/amd/common/block/include/amdblocks/cpu.h @@ -22,5 +22,6 @@ uint32_t get_pstate_core_freq(union pstate_msr pstate_reg); uint32_t get_pstate_core_uvolts(union pstate_msr pstate_reg); const acpi_cstate_t *get_cstate_config_data(size_t *size); +void amd_cpu_init(struct device *dev);
#endif /* AMD_BLOCK_CPU_H */ diff --git a/src/soc/amd/genoa_poc/cpu.c b/src/soc/amd/genoa_poc/cpu.c index 241bec2..89e7ef6 100644 --- a/src/soc/amd/genoa_poc/cpu.c +++ b/src/soc/amd/genoa_poc/cpu.c @@ -7,16 +7,8 @@ #include <device/device.h> #include <soc/cpu.h>
-static void model_19_init(struct device *dev) -{ - check_mca(); - set_cstate_io_addr(); - - amd_apply_microcode_patch(); -} - static struct device_operations cpu_dev_ops = { - .init = model_19_init, + .init = amd_cpu_init, };
static struct cpu_device_id cpu_table[] = { diff --git a/src/soc/amd/glinda/cpu.c b/src/soc/amd/glinda/cpu.c index a716127..2b49c41 100644 --- a/src/soc/amd/glinda/cpu.c +++ b/src/soc/amd/glinda/cpu.c @@ -12,16 +12,8 @@ _Static_assert(CONFIG_MAX_CPUS == 24, "Do not override MAX_CPUS. To reduce the number of " "available cores, use the downcore_mode and disable_smt devicetree settings instead.");
-static void zen_2_3_init(struct device *dev) -{ - check_mca(); - set_cstate_io_addr(); - - amd_apply_microcode_patch(); -} - static struct device_operations cpu_dev_ops = { - .init = zen_2_3_init, + .init = amd_cpu_init, };
static struct cpu_device_id cpu_table[] = { diff --git a/src/soc/amd/mendocino/cpu.c b/src/soc/amd/mendocino/cpu.c index 842b04f..14e1b23 100644 --- a/src/soc/amd/mendocino/cpu.c +++ b/src/soc/amd/mendocino/cpu.c @@ -10,16 +10,8 @@ _Static_assert(CONFIG_MAX_CPUS == 8, "Do not override MAX_CPUS. To reduce the number of " "available cores, use the downcore_mode and disable_smt devicetree settings instead.");
-static void zen_2_3_init(struct device *dev) -{ - check_mca(); - set_cstate_io_addr(); - - amd_apply_microcode_patch(); -} - static struct device_operations cpu_dev_ops = { - .init = zen_2_3_init, + .init = amd_cpu_init, };
static struct cpu_device_id cpu_table[] = { diff --git a/src/soc/amd/phoenix/cpu.c b/src/soc/amd/phoenix/cpu.c index 05dac9a..1e05413 100644 --- a/src/soc/amd/phoenix/cpu.c +++ b/src/soc/amd/phoenix/cpu.c @@ -12,16 +12,8 @@ _Static_assert(CONFIG_MAX_CPUS == 16, "Do not override MAX_CPUS. To reduce the number of " "available cores, use the downcore_mode and disable_smt devicetree settings instead.");
-static void zen_2_3_init(struct device *dev) -{ - check_mca(); - set_cstate_io_addr(); - - amd_apply_microcode_patch(); -} - static struct device_operations cpu_dev_ops = { - .init = zen_2_3_init, + .init = amd_cpu_init, };
static struct cpu_device_id cpu_table[] = {
-
Naresh Solanki (Code Review)