HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31063
Change subject: nb/intel/i945: Fix typo on DMIBAR32(0x334) ......................................................................
nb/intel/i945: Fix typo on DMIBAR32(0x334)
Change-Id: Ib894c24bc787c6c211da26dca78bcd330ded6681 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/i945/early_init.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/31063/1
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index f11e612..cc7b1ef 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -513,7 +513,7 @@ DMIBAR32(0x314) = DMIBAR32(0x314); DMIBAR32(0x324) = DMIBAR32(0x324); DMIBAR32(0x328) = DMIBAR32(0x328); - DMIBAR32(0x338) = DMIBAR32(0x334); + DMIBAR32(0x334) = DMIBAR32(0x334); DMIBAR32(0x338) = DMIBAR32(0x338);
if (i945_silicon_revision() == 1 && (MCHBAR8(DFT_STRAP1) & (1 << 5))) {
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31063 )
Change subject: nb/intel/i945: Fix typo on DMIBAR32(0x334) ......................................................................
Patch Set 1: Code-Review+1
lol
Well, it obviously is wrong. But after 10 years + of testing why risk to break something?
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31063 )
Change subject: nb/intel/i945: Fix typo on DMIBAR32(0x334) ......................................................................
Patch Set 1:
lol
Well, it obviously is wrong. But after 10 years + of testing why risk to break something?
Actually we don't know if the code is wrong or the absence of a comment that would explain the intention. I first thought, the comment above says that we write-back what we read, but it doesn't go into that much detail.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31063 )
Change subject: nb/intel/i945: Fix typo on DMIBAR32(0x334) ......................................................................
Patch Set 1: Code-Review+1
lol
It would be wise to test this thoroughly. If it does indeed break something, I would definitely leave a comment regarding the matter.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31063 )
Change subject: nb/intel/i945: Fix typo on DMIBAR32(0x334) ......................................................................
Patch Set 1:
Elyes, you could also dump the values of these registers before writing to them. Maybe both have the same value anyway. Then we could be sure that this doesn't break anything.
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31063 )
Change subject: nb/intel/i945: Fix typo on DMIBAR32(0x334) ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/31063/1/src/northbridge/intel/i945/early_ini... File src/northbridge/intel/i945/early_init.c:
https://review.coreboot.org/#/c/31063/1/src/northbridge/intel/i945/early_ini... PS1, Line 512: : : : : : lol
I've dropped all of them and still getting the same values tested on 945G-M4 + inteltool (with and without all of those lines): 0x0308: 0x00060018 0x0314: 0x00060000 0x0324: 0x00030018 0x0324: 0x00030018 0x0328: 0x00030000 0x0334: 0x00040008 0x0338: 0x00040000
I also have the same values with or without this patch, so for me, they are not WO but RO registers ...
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31063 )
Change subject: nb/intel/i945: Fix typo on DMIBAR32(0x334) ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/#/c/31063/1/src/northbridge/intel/i945/early_ini... File src/northbridge/intel/i945/early_init.c:
https://review.coreboot.org/#/c/31063/1/src/northbridge/intel/i945/early_ini... PS1, Line 512: : : : : :
lol […]
Or maybe just bit 3 at 0x338 is RO. That's all we know.
Oh, wait did you remove all power in between? otherwise the values of a previous boot might still stick... not likely as 0x334 and 0x338 differ, though.
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31063 )
Change subject: nb/intel/i945: Fix typo on DMIBAR32(0x334) ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/31063/1/src/northbridge/intel/i945/early_ini... File src/northbridge/intel/i945/early_init.c:
https://review.coreboot.org/#/c/31063/1/src/northbridge/intel/i945/early_ini... PS1, Line 512: : : : : :
Or maybe just bit 3 at 0x338 is RO. That's all we know. […]
yes, I've removed all power and switched on without power in between. still getting the same values:) 0x0308: 0x00060018 0x0314: 0x00060000 0x0324: 0x00030018 0x0328: 0x00030000 0x0334: 0x00040008 0x0338: 0x00040000
Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31063 )
Change subject: nb/intel/i945: Fix typo on DMIBAR32(0x334) ......................................................................
nb/intel/i945: Fix typo on DMIBAR32(0x334)
Change-Id: Ib894c24bc787c6c211da26dca78bcd330ded6681 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/31063 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Nico Huber nico.h@gmx.de --- M src/northbridge/intel/i945/early_init.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index 763300a..b82812e 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -530,7 +530,7 @@ DMIBAR32(0x314) = DMIBAR32(0x314); DMIBAR32(0x324) = DMIBAR32(0x324); DMIBAR32(0x328) = DMIBAR32(0x328); - DMIBAR32(0x338) = DMIBAR32(0x334); + DMIBAR32(0x334) = DMIBAR32(0x334); DMIBAR32(0x338) = DMIBAR32(0x338);
if (i945_silicon_revision() == 1 && (MCHBAR8(DFT_STRAP1) & (1 << 5))) {