Change in coreboot[master]: soc/amd,{agesa,pi}/hudson: Have do_board_reset in all stages
Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37711 )
Change subject: soc/amd,{agesa,pi}/hudson: Have do_board_reset in all stages ......................................................................
soc/amd,{agesa,pi}/hudson: Have do_board_reset in all stages
Change-Id: I38a721c359ab7761c5a3ea79da0c159fd7f58970 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Makefile.inc M src/southbridge/amd/agesa/hudson/Makefile.inc M src/southbridge/amd/cimx/sb800/Makefile.inc M src/southbridge/amd/pi/hudson/Makefile.inc 5 files changed, 10 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/37711/1
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 76a4d70..4492653 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -41,7 +41,6 @@ romstage-y += romstage.c romstage-y += gpio.c romstage-y += pmutil.c -romstage-y += reset.c romstage-y += smbus.c romstage-y += memmap.c romstage-$(CONFIG_PICASSO_UART) += uart.c @@ -52,7 +51,6 @@ verstage-y += gpio.c verstage-y += i2c.c verstage-y += pmutil.c -verstage-y += reset.c verstage-$(CONFIG_PICASSO_UART) += uart.c verstage-y += tsc_freq.c
@@ -71,7 +69,6 @@ ramstage-y += southbridge.c ramstage-y += northbridge.c ramstage-y += pmutil.c -ramstage-y += reset.c ramstage-y += acp.c ramstage-y += sata.c ramstage-y += sm.c @@ -84,6 +81,8 @@ ramstage-y += tsc_freq.c ramstage-y += finalize.c
+all-y += reset.c + smm-y += smihandler.c smm-y += smi_util.c smm-y += tsc_freq.c diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 15216b7..e6cfa12 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -45,7 +45,6 @@ bootblock-y += enable_usbdebug.c bootblock-y += monotonic_timer.c bootblock-y += pmutil.c -bootblock-y += reset.c bootblock-y += tsc_freq.c bootblock-y += southbridge.c bootblock-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c @@ -57,7 +56,6 @@ romstage-y += gpio.c romstage-y += monotonic_timer.c romstage-y += pmutil.c -romstage-y += reset.c romstage-y += smbus.c romstage-y += smbus_spd.c romstage-y += memmap.c @@ -70,7 +68,6 @@ verstage-y += i2c.c verstage-y += monotonic_timer.c verstage-y += pmutil.c -verstage-y += reset.c verstage-$(CONFIG_STONEYRIDGE_UART) += uart.c verstage-y += tsc_freq.c
@@ -92,7 +89,6 @@ ramstage-y += southbridge.c ramstage-y += northbridge.c ramstage-y += pmutil.c -ramstage-y += reset.c ramstage-y += sata.c ramstage-y += sm.c ramstage-y += smbus.c @@ -104,6 +100,8 @@ ramstage-y += tsc_freq.c ramstage-y += finalize.c
+all-y += reset.c + smm-y += monotonic_timer.c smm-y += smihandler.c smm-y += smi_util.c diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc index 5c92128..be4ea26 100644 --- a/src/southbridge/amd/agesa/hudson/Makefile.inc +++ b/src/southbridge/amd/agesa/hudson/Makefile.inc @@ -15,7 +15,6 @@ ramstage-y += sd.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c -ramstage-y += reset.c
ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y) bootblock-y += bootblock.c @@ -36,6 +35,8 @@ romstage-y += imc.c ramstage-y += imc.c
+all-y += reset.c + smm-y += smihandler.c smi_util.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smi_util.c
diff --git a/src/southbridge/amd/cimx/sb800/Makefile.inc b/src/southbridge/amd/cimx/sb800/Makefile.inc index ccb3a2a..5a68d07 100644 --- a/src/southbridge/amd/cimx/sb800/Makefile.inc +++ b/src/southbridge/amd/cimx/sb800/Makefile.inc @@ -23,11 +23,11 @@ romstage-y += cfg.c romstage-y += early.c romstage-y += smbus.c smbus_spd.c -romstage-y += reset.c
ramstage-y += cfg.c ramstage-y += late.c -ramstage-y += reset.c + +all-y += reset.c
ramstage-$(CONFIG_SB800_MANUAL_FAN_CONTROL) += fan.c ramstage-$(CONFIG_SB800_IMC_FAN_CONTROL) += fan.c diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc index 615fc04..4aa9bab 100644 --- a/src/southbridge/amd/pi/hudson/Makefile.inc +++ b/src/southbridge/amd/pi/hudson/Makefile.inc @@ -42,7 +42,6 @@ romstage-$(CONFIG_HUDSON_UART) += uart.c
verstage-y += early_setup.c -verstage-y += reset.c verstage-$(CONFIG_HUDSON_UART) += uart.c
ramstage-y += enable_usbdebug.c @@ -55,7 +54,6 @@ ramstage-y += lpc.c ramstage-y += pci.c ramstage-y += pcie.c -ramstage-y += reset.c ramstage-y += sata.c ramstage-y += sd.c ramstage-y += sm.c @@ -64,6 +62,8 @@ ramstage-$(CONFIG_HUDSON_UART) += uart.c ramstage-y += usb.c
+all-y += reset.c + smm-y += smihandler.c smm-y += smi_util.c
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37711 )
Change subject: soc/amd,{agesa,pi}/hudson: Have do_board_reset in all stages ......................................................................
Patch Set 1: Code-Review+2
Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37711 )
Change subject: soc/amd,{agesa,pi}/hudson: Have do_board_reset in all stages ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37711 )
Change subject: soc/amd,{agesa,pi}/hudson: Have do_board_reset in all stages ......................................................................
soc/amd,{agesa,pi}/hudson: Have do_board_reset in all stages
Change-Id: I38a721c359ab7761c5a3ea79da0c159fd7f58970 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/37711 Reviewed-by: Mike Banon mikebdp2@gmail.com Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Makefile.inc M src/southbridge/amd/agesa/hudson/Makefile.inc M src/southbridge/amd/cimx/sb800/Makefile.inc M src/southbridge/amd/pi/hudson/Makefile.inc 5 files changed, 10 insertions(+), 12 deletions(-)
Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved Mike Banon: Looks good to me, approved
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 76a4d70..4492653 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -41,7 +41,6 @@ romstage-y += romstage.c romstage-y += gpio.c romstage-y += pmutil.c -romstage-y += reset.c romstage-y += smbus.c romstage-y += memmap.c romstage-$(CONFIG_PICASSO_UART) += uart.c @@ -52,7 +51,6 @@ verstage-y += gpio.c verstage-y += i2c.c verstage-y += pmutil.c -verstage-y += reset.c verstage-$(CONFIG_PICASSO_UART) += uart.c verstage-y += tsc_freq.c
@@ -71,7 +69,6 @@ ramstage-y += southbridge.c ramstage-y += northbridge.c ramstage-y += pmutil.c -ramstage-y += reset.c ramstage-y += acp.c ramstage-y += sata.c ramstage-y += sm.c @@ -84,6 +81,8 @@ ramstage-y += tsc_freq.c ramstage-y += finalize.c
+all-y += reset.c + smm-y += smihandler.c smm-y += smi_util.c smm-y += tsc_freq.c diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 15216b7..e6cfa12 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -45,7 +45,6 @@ bootblock-y += enable_usbdebug.c bootblock-y += monotonic_timer.c bootblock-y += pmutil.c -bootblock-y += reset.c bootblock-y += tsc_freq.c bootblock-y += southbridge.c bootblock-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c @@ -57,7 +56,6 @@ romstage-y += gpio.c romstage-y += monotonic_timer.c romstage-y += pmutil.c -romstage-y += reset.c romstage-y += smbus.c romstage-y += smbus_spd.c romstage-y += memmap.c @@ -70,7 +68,6 @@ verstage-y += i2c.c verstage-y += monotonic_timer.c verstage-y += pmutil.c -verstage-y += reset.c verstage-$(CONFIG_STONEYRIDGE_UART) += uart.c verstage-y += tsc_freq.c
@@ -92,7 +89,6 @@ ramstage-y += southbridge.c ramstage-y += northbridge.c ramstage-y += pmutil.c -ramstage-y += reset.c ramstage-y += sata.c ramstage-y += sm.c ramstage-y += smbus.c @@ -104,6 +100,8 @@ ramstage-y += tsc_freq.c ramstage-y += finalize.c
+all-y += reset.c + smm-y += monotonic_timer.c smm-y += smihandler.c smm-y += smi_util.c diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc index 5c92128..be4ea26 100644 --- a/src/southbridge/amd/agesa/hudson/Makefile.inc +++ b/src/southbridge/amd/agesa/hudson/Makefile.inc @@ -15,7 +15,6 @@ ramstage-y += sd.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c -ramstage-y += reset.c
ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y) bootblock-y += bootblock.c @@ -36,6 +35,8 @@ romstage-y += imc.c ramstage-y += imc.c
+all-y += reset.c + smm-y += smihandler.c smi_util.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smi_util.c
diff --git a/src/southbridge/amd/cimx/sb800/Makefile.inc b/src/southbridge/amd/cimx/sb800/Makefile.inc index ccb3a2a..5a68d07 100644 --- a/src/southbridge/amd/cimx/sb800/Makefile.inc +++ b/src/southbridge/amd/cimx/sb800/Makefile.inc @@ -23,11 +23,11 @@ romstage-y += cfg.c romstage-y += early.c romstage-y += smbus.c smbus_spd.c -romstage-y += reset.c
ramstage-y += cfg.c ramstage-y += late.c -ramstage-y += reset.c + +all-y += reset.c
ramstage-$(CONFIG_SB800_MANUAL_FAN_CONTROL) += fan.c ramstage-$(CONFIG_SB800_IMC_FAN_CONTROL) += fan.c diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc index 615fc04..4aa9bab 100644 --- a/src/southbridge/amd/pi/hudson/Makefile.inc +++ b/src/southbridge/amd/pi/hudson/Makefile.inc @@ -42,7 +42,6 @@ romstage-$(CONFIG_HUDSON_UART) += uart.c
verstage-y += early_setup.c -verstage-y += reset.c verstage-$(CONFIG_HUDSON_UART) += uart.c
ramstage-y += enable_usbdebug.c @@ -55,7 +54,6 @@ ramstage-y += lpc.c ramstage-y += pci.c ramstage-y += pcie.c -ramstage-y += reset.c ramstage-y += sata.c ramstage-y += sd.c ramstage-y += sm.c @@ -64,6 +62,8 @@ ramstage-$(CONFIG_HUDSON_UART) += uart.c ramstage-y += usb.c
+all-y += reset.c + smm-y += smihandler.c smm-y += smi_util.c
-
Kyösti Mälkki (Code Review) -
Marshall Dawson (Code Review)
-
Mike Banon (Code Review)
-
Patrick Georgi (Code Review)