Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31097 )
Change subject: src/mb/google/hatch: disable HECI ......................................................................
Patch Set 1: Code-Review-1
Patch Set 1:
Patch Set 1:
Patch Set 1:
Patch Set 1: Code-Review-1
Yes, this causes hatch to not boot. It gets stuck after finalizing SMM output in the BIOS logs:
CBFS: 'VBOOT' located CBFS at [1410000:1521000) CBFS: Locating 'fallback/payload' CBFS: Found @ offset fc000 size 14fc4 Checking segment from ROM address 0xff50c038 Checking segment from ROM address 0xff50c054 Loading segment from ROM address 0xff50c038 code (compression=1) New segment dstaddr 0x30104020 memsize 0x638f10 srcaddr 0xff50c070 filesize 0c Loading Segment: addr: 0x30104020 memsz: 0x0000000000638f10 filesz: 0x000000000c using LZMA [ 0x30104020, 3012e5c0, 0x3073cf30) <- ff50c070 Clearing Segment: addr: 0x000000003012e5c0 memsz: 0x000000000060e970 Loading segment from ROM address 0xff50c054 Entry Point 0x30104020 Loaded segments Finalizing chipset. Finalizing SMM.
Could this be because of the SaGv enable change?
No. I tried disabling HECI after I put in the SaGv_Enabled fix and results in this.
I believe my wording was imprecise. CB:31095 (SaGv fix) is most likely not an issue, but CB:30774 (which enabled HECI as well as SaGv for Hatch) could be an issue. Maybe SaGv depends on HECI?
There is no relation between SaGv and HECI this both things are totally different. No dependency at all. Both are different Features.
As discussed CB:30774 at this point HeciEnabled should be 1 to make platform boot. Bug:123413775 is already raised. HeciEnabled can't be zero.