Change in coreboot[master]: soc/amd/picasso/iomap: change ACPI_CPU_CONTROL to match AGESA

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50288 )

Change subject: soc/amd/picasso/iomap: change ACPI_CPU_CONTROL to match AGESA
......................................................................

soc/amd/picasso/iomap: change ACPI_CPU_CONTROL to match AGESA

Signed-off-by: Felix Held 
Change-Id: I80e11d9792ee4138cb376ebbe0438dc304b54527
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50288
Reviewed-by: Marshall Dawson 
Tested-by: build bot (Jenkins) 
---
M src/soc/amd/picasso/include/soc/iomap.h
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Marshall Dawson: Looks good to me, approved

diff --git a/src/soc/amd/picasso/include/soc/iomap.h b/src/soc/amd/picasso/include/soc/iomap.h
index 3d0432b..91f0509 100644
--- a/src/soc/amd/picasso/include/soc/iomap.h
+++ b/src/soc/amd/picasso/include/soc/iomap.h
@@ -78,7 +78,7 @@
 #define  ACPI_PM1_EN		(ACPI_PM_EVT_BLK + 0x02)	  /* 2 bytes */
 #define  ACPI_PM1_CNT_BLK	(ACPI_IO_BASE + 0x04)     /* 2 bytes */
 #define  ACPI_PM_TMR_BLK	(ACPI_IO_BASE + 0x08)     /* 4 bytes */
-#define  ACPI_CPU_CONTROL	(ACPI_IO_BASE + 0x13)
+#define  ACPI_CPU_CONTROL	(ACPI_IO_BASE + 0x10)
 /* doc says 0x14 for GPE0_BLK but FT5 only works with 0x20 */
 #define  ACPI_GPE0_BLK		(ACPI_IO_BASE + 0x20)     /* 8 bytes */
 #define  ACPI_GPE0_STS		(ACPI_GPE0_BLK + 0x00)		  /* 4 bytes */