Change in coreboot[master]: soc/amd/psp_verstage: Init TPM on S0i3 resume

[Rob Barnes (Code Review)]

Attention is currently required from: Raul Rangel, Andrey Pronin, Kangheui Won, Karthik Ramasubramanian.
Hello build bot (Jenkins), Jason Glenesk, Andrey Pronin, Raul Rangel, Marshall Dawson, Kangheui Won, Julius Werner, Yu-Ping Wu, Andrey Pronin, Karthik Ramasubramanian, Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/58870

to look at the new patch set (#15).

Change subject: soc/amd/psp_verstage: Init TPM on S0i3 resume
......................................................................

soc/amd/psp_verstage: Init TPM on S0i3 resume

Add option to initialize the TPM in PSP verstage during s0i3 resume.
This is needed if the TPM is reset in s0i3. FSDL is handling
restoring everything else, so only the minimum TPM initialization is done.
Move aoac and i2c init before psp_verstrage_s0i3_resume becasue i2c
needs to be ready before attempting to restore tpm.

BUG=b:200578885,b:197965075
TEST=Multiple cycles of S0i3 suspend resume. ~66ms of additional delay.
BRANCH=None

Change-Id: Ie511928da6a8b4be62621fd2c4c31a8d1e724d48
Signed-off-by: Rob Barnes 
---
M src/soc/amd/cezanne/Kconfig
M src/soc/amd/common/psp_verstage/include/psp_verstage.h
M src/soc/amd/common/psp_verstage/psp_verstage.c
3 files changed, 62 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/58870/15