Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56175 )
Change subject: soc/intel/alderlake: Add (and fix) devices in IRQ table ......................................................................
Patch Set 5: Code-Review+2
(2 comments)
Patchset:
PS5: Is a similar change required for other platforms as well? TGL, CML?
File src/soc/intel/alderlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/56175/comment/12b7f1d9_2c8a017c PS5, Line 51: /* INTERRUPT_PIN is RO/0x01 */ Since this is a single-function device, the RO field for INTERRUPT_PIN makes sense. ANY_PIRQ would work equally well here since the IRQ driver will default to using PCI_INT_A. But, I think FIXED_INT_ANY_PIRQ is fine for consistency with other devices that are not single-function but still have this pin as RO.
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Furquan Shaikh (Code Review)