Change in coreboot[master]: intel/fsp2_0: Move TS_BEFORE_INITRAM

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35371 )

Change subject: intel/fsp2_0: Move TS_BEFORE_INITRAM
......................................................................

intel/fsp2_0: Move TS_BEFORE_INITRAM

Exclude FSP-M loading from the timestamps used for
RAM detection and training process.

Change-Id: I859b292f2347c6f0e3e41555ad4fb8d95a139007
Signed-off-by: Kyösti Mälkki 
---
M src/drivers/intel/fsp2_0/memory_init.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/35371/1

diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 1386d2c..5765fb7 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -392,8 +392,6 @@
    struct memranges memmap;
    struct range_entry freeranges[2];

-	timestamp_add_now(TS_BEFORE_INITRAM);
-
    if (CONFIG(ELOG_BOOT_COUNT) && !s3wake)
    	boot_count_increment();

@@ -421,6 +419,8 @@
    /* Signal that FSP component has been loaded. */
    prog_segment_loaded(hdr.image_base, hdr.image_size, SEG_FINAL);

+	timestamp_add_now(TS_BEFORE_INITRAM);
+
    do_fsp_memory_init(&hdr, s3wake, &memmap);

timestamp_add_now(TS_AFTER_INITRAM);

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35371 )

Change subject: intel/fsp2_0: Move TS_BEFORE_INITRAM
......................................................................

Patch Set 1: Code-Review+2

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35371 )

Change subject: intel/fsp2_0: Move TS_BEFORE_INITRAM
......................................................................

Patch Set 1: Code-Review+2

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35371 )

Change subject: intel/fsp2_0: Move TS_BEFORE_INITRAM
......................................................................

Patch Set 1: Code-Review+2

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35371 )

Change subject: intel/fsp2_0: Move TS_BEFORE_INITRAM
......................................................................

intel/fsp2_0: Move TS_BEFORE_INITRAM

Exclude FSP-M loading from the timestamps used for
RAM detection and training process.

Change-Id: I859b292f2347c6f0e3e41555ad4fb8d95a139007
Signed-off-by: Kyösti Mälkki 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35371
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by: Subrata Banik 
Reviewed-by: Furquan Shaikh 
---
M src/drivers/intel/fsp2_0/memory_init.c
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved
  Subrata Banik: Looks good to me, approved
  Angel Pons: Looks good to me, approved

diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 1386d2c..5765fb7 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -392,8 +392,6 @@
    struct memranges memmap;
    struct range_entry freeranges[2];

-	timestamp_add_now(TS_BEFORE_INITRAM);
-
    if (CONFIG(ELOG_BOOT_COUNT) && !s3wake)
    	boot_count_increment();

@@ -421,6 +419,8 @@
    /* Signal that FSP component has been loaded. */
    prog_segment_loaded(hdr.image_base, hdr.image_size, SEG_FINAL);

+	timestamp_add_now(TS_BEFORE_INITRAM);
+
    do_fsp_memory_init(&hdr, s3wake, &memmap);

timestamp_add_now(TS_AFTER_INITRAM);