Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55662 )
Change subject: soc/intel/alderlake: Add GFx Device ID 0x46b3 ......................................................................
soc/intel/alderlake: Add GFx Device ID 0x46b3
List of changes: 1. Add new GFx ID 0x46B3 into device/pci_ids.h 2. Update new GFx ID into common graphics.c 3. Add new GFx ID description into report_platform.c
TEST=Build and boot brya
Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com Change-Id: I4343c7343875eb40c2955f6f4dd98d6446852dc0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55662 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subrata.banik@intel.com Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Maulik V Vaghela maulik.v.vaghela@intel.com --- M src/include/device/pci_ids.h M src/soc/intel/alderlake/bootblock/report_platform.c M src/soc/intel/common/block/graphics/graphics.c 3 files changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Subrata Banik: Looks good to me, approved Maulik V Vaghela: Looks good to me, approved
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 8276a3e..541d38e 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3817,6 +3817,7 @@ #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_2 0x46a1 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_3 0x46a3 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_4 0x46a8 +#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_5 0x46b3 #define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680 #define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index a9a761e..5ddc322 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -104,6 +104,7 @@ { PCI_DEVICE_ID_INTEL_ADL_P_GT2_2, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, "Alderlake P GT2" }, + { PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" }, };
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index cbeffce..61d39bd 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -300,6 +300,7 @@ PCI_DEVICE_ID_INTEL_ADL_P_GT2_2, PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, + PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, PCI_DEVICE_ID_INTEL_ADL_S_GT1, PCI_DEVICE_ID_INTEL_ADL_M_GT1, 0,
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Patrick Georgi (Code Review)