Change in coreboot[master]: soc/intel/common: drop default to enable the PIT if SeaBIOS is chosen

[Gerd Hoffmann (Code Review)]

Gerd Hoffmann has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46301 )

Change subject: soc/intel/common: drop default to enable the PIT if SeaBIOS is chosen
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Patch Set 1:

Well.  Sure that actually works?

The pmtimer is used in case seabios runs on qemu and initializes the (virtual) acpi pci device.
I doubt this also happens when running as coreboot payload.

The TSC needs calibration, and seabios uses the PIT for that I think.  Except when running virtualized on KVM, in that case (new enough) seabios can use kvmclock to figure the TSC
frequency.