Attention is currently required from: Shelley Chen, Martin Roth, Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49768 )
Change subject: sc7280: cpucp loading changes ......................................................................
Patch Set 27:
(42 comments)
File src/soc/qualcomm/sc7280/cpucp_load_reset.c:
https://review.coreboot.org/c/coreboot/+/49768/comment/7b5ffa71_e9b9c7ba PS27, Line 15: uint32_t val = read32(EPSSTOP_SECURE_ACCESS_OVERRIDE); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/2343fb20_6971cf5b PS27, Line 15: uint32_t val = read32(EPSSTOP_SECURE_ACCESS_OVERRIDE); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/85a9baac_eeed702f PS27, Line 16: val |= 0x1; code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/18998a28_01607cc0 PS27, Line 16: val |= 0x1; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/57b16ed8_b8793c97 PS27, Line 18: /* allow NS access to EPSS memory*/ code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/2213b215_06dae7d2 PS27, Line 19: write32(EPSSTOP_SECURE_ACCESS_OVERRIDE, val); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/1d49687c_2f1970c9 PS27, Line 19: write32(EPSSTOP_SECURE_ACCESS_OVERRIDE, val); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/7ef51e13_37afc06e PS27, Line 21: val = read32(EPSSFAST_EPSS_MUC_CLK_CTRL); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/69dc65f2_de60a3f1 PS27, Line 21: val = read32(EPSSFAST_EPSS_MUC_CLK_CTRL); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/a6ddc4c6_f3920ad7 PS27, Line 22: val |= 0x1; code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/ef9d9c7e_cc77752e PS27, Line 22: val |= 0x1; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/75260d18_2bb24766 PS27, Line 24: /* Enable subsystem clock. Required for CPUCP PDMEM access*/ code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/da76457c_32671b87 PS27, Line 25: write32(EPSSFAST_EPSS_MUC_CLK_CTRL, val); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/904d9d84_68f6bbc0 PS27, Line 25: write32(EPSSFAST_EPSS_MUC_CLK_CTRL, val); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/5b847ebe_e9c318f2 PS27, Line 27: while((read32(EPSSFAST_EPSS_MUC_CLK_CTRL) & 0x1) != 0x1); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/93f3b85c_3577e926 PS27, Line 27: while((read32(EPSSFAST_EPSS_MUC_CLK_CTRL) & 0x1) != 0x1); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/3399c768_3bb90c03 PS27, Line 27: while((read32(EPSSFAST_EPSS_MUC_CLK_CTRL) & 0x1) != 0x1); space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/49768/comment/aeb573b6_3803f4ec PS27, Line 27: while((read32(EPSSFAST_EPSS_MUC_CLK_CTRL) & 0x1) != 0x1); trailing statements should be on next line
https://review.coreboot.org/c/coreboot/+/49768/comment/ad6560e3_3328c8e7 PS27, Line 32: bool cpucp_fw_entry; code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/bdd62a49_94629566 PS27, Line 32: bool cpucp_fw_entry; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/f57bae28_22aeb8dc PS27, Line 33: printk(BIOS_DEBUG, "\nSOC:CPUCP image loading.\n"); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/fb73b8d7_5bef5cca PS27, Line 33: printk(BIOS_DEBUG, "\nSOC:CPUCP image loading.\n"); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/0173d5d8_2d0ef134 PS27, Line 35: struct prog cpucp_fw_prog = code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/38364340_1df4f3aa PS27, Line 35: struct prog cpucp_fw_prog = please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/fde241e3_b8eb4560 PS27, Line 36: PROG_INIT(PROG_PAYLOAD, CONFIG_CBFS_PREFIX "/cpucp"); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/7743cb41_4e33c0f0 PS27, Line 36: PROG_INIT(PROG_PAYLOAD, CONFIG_CBFS_PREFIX "/cpucp"); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/42904cb9_afe40ae7 PS27, Line 38: cpucp_prepare(); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/dca5a862_734cf9c1 PS27, Line 38: cpucp_prepare(); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/66ba8a7d_42efd302 PS27, Line 40: if (prog_locate(&cpucp_fw_prog)) code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/53e209b3_50898f31 PS27, Line 40: if (prog_locate(&cpucp_fw_prog)) please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/9c6eb7ab_0cb79ab5 PS27, Line 41: die("SOC imagpe: CPUCP_FW not found"); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/36ee6018_9e37d35b PS27, Line 41: die("SOC imagpe: CPUCP_FW not found"); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/6387f58f_f5215255 PS27, Line 43: cpucp_fw_entry = selfload(&cpucp_fw_prog); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/11fe4f7a_eb29a38f PS27, Line 43: cpucp_fw_entry = selfload(&cpucp_fw_prog); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/c4c2ebd6_1f7c337d PS27, Line 44: if (!cpucp_fw_entry) code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/bffc52c3_ec8406f8 PS27, Line 44: if (!cpucp_fw_entry) please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/94c0a52a_ab2351cd PS27, Line 45: die("SOC image: CPUCP load failed"); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/c1052350_77e5d4d2 PS27, Line 45: die("SOC image: CPUCP load failed"); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/49768/comment/a01f72b8_bdcb9784 PS27, Line 49: printk(BIOS_DEBUG, "\nSOC:CPUCP image loaded successfully.\n"); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/f80a49e7_d705cb92 PS27, Line 49: printk(BIOS_DEBUG, "\nSOC:CPUCP image loaded successfully.\n"); please, no spaces at the start of a line
File src/soc/qualcomm/sc7280/soc.c:
https://review.coreboot.org/c/coreboot/+/49768/comment/24df4a11_86f65144 PS27, Line 20: REGION_SIZE(dram_cpucp) / KiB); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/49768/comment/e5fd6969_4b3b569d PS27, Line 20: REGION_SIZE(dram_cpucp) / KiB); please, no spaces at the start of a line