HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40743 )
Change subject: payloads: Fix 16-bit read/write to PCI_COMMAND registe ......................................................................
payloads: Fix 16-bit read/write to PCI_COMMAND registe
Change-Id: I34facbe0cbbdc91066799b586d96abca1599c509 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M payloads/libpayload/drivers/usb/ehci.c M payloads/libpayload/drivers/usb/usbinit.c 2 files changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/40743/1
diff --git a/payloads/libpayload/drivers/usb/ehci.c b/payloads/libpayload/drivers/usb/ehci.c index bf8a5ea..7969feb 100644 --- a/payloads/libpayload/drivers/usb/ehci.c +++ b/payloads/libpayload/drivers/usb/ehci.c @@ -860,9 +860,9 @@ hci_t *controller; u32 reg_base;
- u32 pci_command = pci_read_config32(addr, PCI_COMMAND); + u16 pci_command = pci_read_config16(addr, PCI_COMMAND); pci_command = (pci_command | PCI_COMMAND_MEMORY) & ~PCI_COMMAND_IO ; - pci_write_config32(addr, PCI_COMMAND, pci_command); + pci_write_config16(addr, PCI_COMMAND, pci_command);
reg_base = pci_read_config32 (addr, USBBASE);
diff --git a/payloads/libpayload/drivers/usb/usbinit.c b/payloads/libpayload/drivers/usb/usbinit.c index 0ac27e4..49634c6 100644 --- a/payloads/libpayload/drivers/usb/usbinit.c +++ b/payloads/libpayload/drivers/usb/usbinit.c @@ -62,11 +62,11 @@
/* enable busmaster */ if (devclass == 0xc03) { - u32 pci_command; + u16 pci_command;
- pci_command = pci_read_config32(pci_device, PCI_COMMAND); + pci_command = pci_read_config16(pci_device, PCI_COMMAND); pci_command |= PCI_COMMAND_MASTER; - pci_write_config32(pci_device, PCI_COMMAND, pci_command); + pci_write_config16(pci_device, PCI_COMMAND, pci_command);
usb_debug("%02x:%02x.%x %04x:%04x.%d ", bus, dev, func, pciid >> 16, pciid & 0xFFFF, func);
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40743 )
Change subject: payloads: Fix 16-bit read/write to PCI_COMMAND registe ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/40743/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40743/1//COMMIT_MSG@7 PS1, Line 7: registe register
https://review.coreboot.org/c/coreboot/+/40743/1//COMMIT_MSG@7 PS1, Line 7: payloads libpayload
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40743 )
Change subject: payloads: Fix 16-bit read/write to PCI_COMMAND registe ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/40743/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40743/1//COMMIT_MSG@7 PS1, Line 7: registe
register
😊 Thx
https://review.coreboot.org/c/coreboot/+/40743/1//COMMIT_MSG@7 PS1, Line 7: payloads
libpayload
Done
Hello build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/40743
to look at the new patch set (#2).
Change subject: libpayload: Fix 16-bit read/write to PCI_COMMAND register ......................................................................
libpayload: Fix 16-bit read/write to PCI_COMMAND register
Change-Id: I34facbe0cbbdc91066799b586d96abca1599c509 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M payloads/libpayload/drivers/usb/ehci.c M payloads/libpayload/drivers/usb/usbinit.c 2 files changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/40743/2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40743 )
Change subject: libpayload: Fix 16-bit read/write to PCI_COMMAND register ......................................................................
Patch Set 2: Code-Review+1
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40743 )
Change subject: libpayload: Fix 16-bit read/write to PCI_COMMAND register ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40743 )
Change subject: libpayload: Fix 16-bit read/write to PCI_COMMAND register ......................................................................
libpayload: Fix 16-bit read/write to PCI_COMMAND register
Change-Id: I34facbe0cbbdc91066799b586d96abca1599c509 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/40743 Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Nico Huber nico.h@gmx.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M payloads/libpayload/drivers/usb/ehci.c M payloads/libpayload/drivers/usb/usbinit.c 2 files changed, 5 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve
diff --git a/payloads/libpayload/drivers/usb/ehci.c b/payloads/libpayload/drivers/usb/ehci.c index bf8a5ea..7969feb 100644 --- a/payloads/libpayload/drivers/usb/ehci.c +++ b/payloads/libpayload/drivers/usb/ehci.c @@ -860,9 +860,9 @@ hci_t *controller; u32 reg_base;
- u32 pci_command = pci_read_config32(addr, PCI_COMMAND); + u16 pci_command = pci_read_config16(addr, PCI_COMMAND); pci_command = (pci_command | PCI_COMMAND_MEMORY) & ~PCI_COMMAND_IO ; - pci_write_config32(addr, PCI_COMMAND, pci_command); + pci_write_config16(addr, PCI_COMMAND, pci_command);
reg_base = pci_read_config32 (addr, USBBASE);
diff --git a/payloads/libpayload/drivers/usb/usbinit.c b/payloads/libpayload/drivers/usb/usbinit.c index 0ac27e4..49634c6 100644 --- a/payloads/libpayload/drivers/usb/usbinit.c +++ b/payloads/libpayload/drivers/usb/usbinit.c @@ -62,11 +62,11 @@
/* enable busmaster */ if (devclass == 0xc03) { - u32 pci_command; + u16 pci_command;
- pci_command = pci_read_config32(pci_device, PCI_COMMAND); + pci_command = pci_read_config16(pci_device, PCI_COMMAND); pci_command |= PCI_COMMAND_MASTER; - pci_write_config32(pci_device, PCI_COMMAND, pci_command); + pci_write_config16(pci_device, PCI_COMMAND, pci_command);
usb_debug("%02x:%02x.%x %04x:%04x.%d ", bus, dev, func, pciid >> 16, pciid & 0xFFFF, func);