the following patch was just integrated into master: commit 91aea428b5932c031b81a6c4921ac416f2b2c995 Author: Werner Zeh werner.zeh@siemens.com Date: Thu Sep 8 07:27:29 2016 +0200
fsp_broadwell_de: Correct access to SIRQ_CNTL register
The serial IRQ configuration register is only 8 bit wide so switch the PCI access from 16 bits to 8 bits.
Change-Id: Ia9fbc02251e00b31440bf103e2afc2ff285b7f2e Signed-off-by: Werner Zeh werner.zeh@siemens.com Reviewed-on: https://review.coreboot.org/16534 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth martinroth@google.com
See https://review.coreboot.org/16534 for details.
-gerrit