New patch to review for coreboot: 284f7f1 arm: Have the linker garbage-collect unused functions and variables

[Isaac Christensen]

Isaac Christensen ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6904

-gerrit

commit 284f7f1d81f3edc78a183e63f3323c7ca4dc8d52
Author: Julius Werner 
Date:   Tue Oct 15 17:36:17 2013 -0700

arm: Have the linker garbage-collect unused functions and variables

This patch activates -ffunction-sections and -fdata-sections for the
    compiler and --gc-sections for the linker. This will strip out all
    unused functions and static/global variables from the final binaries and
    reduce the amount of data we need to read over SPI.

A quick test with ToT images shows a 2.5k (13%) / 10k (29%) / 12k (28%)
    reduction on Nyan and 3k (38%) / 23k (50%) / 13k (29%) on Pit,
    respectively for bootblock / romstage / ramstage.

Change-Id: I052411d4ad190d0395921ac4d4677341fb91568a
    Signed-off-by: Julius Werner 
    Reviewed-on: https://chromium-review.googlesource.com/177111
    (cherry picked from commit 5635b138778dea67a5f179e13003132be07f7e59)
    Signed-off-by: Isaac Christensen 
---
 src/arch/arm/Makefile.inc | 12 ++++++------
 src/arch/arm/bootblock.ld | 22 ++++++++++++----------
 src/arch/arm/ramstage.ld  | 20 +++++++++++---------
 src/arch/arm/romstage.ld  | 12 ++++++------
 4 files changed, 35 insertions(+), 31 deletions(-)

diff --git a/src/arch/arm/Makefile.inc b/src/arch/arm/Makefile.inc
index 027fbe1..0c1cfc6 100644
--- a/src/arch/arm/Makefile.inc
+++ b/src/arch/arm/Makefile.inc
@@ -62,9 +62,9 @@ bootblock-y += memmove.S
 $(objcbfs)/bootblock.debug: $(src)/arch/arm/bootblock.ld $(obj)/ldoptions $$(bootblock-objs)
    @printf "    LINK       $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD_bootblock) -m armelf_linux_eabi -static -o $@ -L$(obj) $< -T $(src)/arch/arm/bootblock.ld
+	$(LD_bootblock) -m armelf_linux_eabi --gc-sections -static -o $@ -L$(obj) $< -T $(src)/arch/arm/bootblock.ld
 else
-	$(CC_bootblock) $(CFLAGS_bootblock) -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/arm/bootblock.ld -Wl,--start-group $(bootblock-objs) $(LIBGCC_FILE_NAME_bootblock) -Wl,--end-group
+	$(CC_bootblock) $(CFLAGS_bootblock) -nostartfiles -Wl,--gc-sections -static -o $@ -L$(obj) -T $(src)/arch/arm/bootblock.ld -Wl,--start-group $(bootblock-objs) $(LIBGCC_FILE_NAME_bootblock) -Wl,--end-group
 endif

endif # CONFIG_ARCH_BOOTBLOCK_ARM
@@ -87,9 +87,9 @@ VBOOT_STUB_DEPS += $(obj)/arch/arm/eabi_compat.rmodules_arm.o
 $(objcbfs)/romstage.debug: $$(romstage-objs) $(src)/arch/arm/romstage.ld $(obj)/ldoptions
    @printf "    LINK       $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(src)/arch/arm/romstage.ld
+	$(LD_romstage) -nostdlib -nostartfiles --gc-sections -static -o $@ -L$(obj) $(romstage-objs) -T $(src)/arch/arm/romstage.ld
 else
-	$(CC_romstage) $(CFLAGS_romstage) -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/arm/romstage.ld -Wl,--start-group $(romstage-objs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group
+	$(CC_romstage) $(CFLAGS_romstage) -nostartfiles -Wl,--gc-sections -static -o $@ -L$(obj) -T $(src)/arch/arm/romstage.ld -Wl,--start-group $(romstage-objs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group
 endif

endif # CONFIG_ARCH_ROMSTAGE_ARM
@@ -122,9 +122,9 @@ endif
 $(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage)
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD_ramstage) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) --end-group
+	$(LD_ramstage) -m -m armelf_linux_eabi --gc-sections -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) --end-group
 else
-	$(CC_ramstage) $(CFLAGS_ramstage) $(CPPFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group
+	$(CC_ramstage) $(CFLAGS_ramstage) $(CPPFLAGS_ramstage) -nostdlib -Wl,--gc-sections -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group
 endif

endif # CONFIG_ARCH_RAMSTAGE_ARM
diff --git a/src/arch/arm/bootblock.ld b/src/arch/arm/bootblock.ld
index 706f0a2..2b04b22 100644
--- a/src/arch/arm/bootblock.ld
+++ b/src/arch/arm/bootblock.ld
@@ -28,23 +28,25 @@ PHDRS
    to_load PT_LOAD;
 }

+ENTRY(_start)
 TARGET(binary)
 SECTIONS
 {
-	ROMLOC = CONFIG_BOOTBLOCK_BASE;
+	. = CONFIG_BOOTBLOCK_BASE;

-	/* This section might be better named .setup */
-	.rom ROMLOC : {
-		_rom = .;
+	.bootblock . : {
    	*(.start);
-		*(.id);
+		KEEP(*(.id));
    	*(.text);
    	*(.text.*);
-		*(.rom.text);
-		*(.rom.data);
-		*(.rom.data.*);
+		*(.rodata);
    	*(.rodata.*);
-		_erom = .;
+		*(.data);
+		*(.data.*);
+		*(.bss);
+		*(.bss.*);
+		*(.sbss);
+		*(.sbss.*);
    } : to_load = 0xff

/DISCARD/ : {
@@ -54,4 +56,4 @@ SECTIONS
    	*(.note.*)
    	*(.ARM.*)
    }
-}
+}
\ No newline at end of file
diff --git a/src/arch/arm/ramstage.ld b/src/arch/arm/ramstage.ld
index cab512e..5469509 100644
--- a/src/arch/arm/ramstage.ld
+++ b/src/arch/arm/ramstage.ld
@@ -48,7 +48,7 @@ SECTIONS
    .ctors : {
    	. = ALIGN(0x100);
    	__CTOR_LIST__ = .;
-		*(.ctors);
+		KEEP(*(.ctors));
    	LONG(0);
    	__CTOR_END__ = .;
    }
@@ -57,13 +57,13 @@ SECTIONS
    	_rodata = .;
    	. = ALIGN(4);
    	pci_drivers = . ;
-		*(.rodata.pci_driver)
+		KEEP(*(.rodata.pci_driver));
    	epci_drivers = . ;
    	cpu_drivers = . ;
-		*(.rodata.cpu_driver)
+		KEEP(*(.rodata.cpu_driver));
    	ecpu_drivers = . ;
    	_bs_init_begin = .;
-		*(.bs_init)
+		KEEP(*(.bs_init));
    	_bs_init_end = .;
    	*(.rodata)
    	*(.rodata.*)
@@ -83,6 +83,7 @@ SECTIONS
    .data : {
    	_data = .;
    	*(.data)
+		*(.data.*)
    	_edata = .;
    }

@@ -90,26 +91,27 @@ SECTIONS
     * initialized on startup. (typically uninitialized global variables)
     * crt0.S fills between _bss and _ebss with zeroes.
     */
-	_bss = .;
    .bss . : {
+		_bss = .;
    	*(.bss)
+		*(.bss.*)
    	*(.sbss)
-		*(COMMON)
+		*(.sbss.*)
+		_ebss = .;
    }
-	_ebss = .;
    _end = .;

/* coreboot really "ends" here. Only heap and stack are placed after
     * this line.
     */

-        _heap = .;
         .heap . : {
+			_heap = .;
                 /* Reserve CONFIG_HEAP_SIZE bytes for the heap */
                 . = CONFIG_HEAP_SIZE ;
                 . = ALIGN(4);
+			_eheap = .;
         }
-        _eheap = .;

/* The ram segment. This includes all memory used by the memory
     * resident copy of coreboot, except the tables that are produced on
diff --git a/src/arch/arm/romstage.ld b/src/arch/arm/romstage.ld
index 750525b..04d8f4b 100644
--- a/src/arch/arm/romstage.ld
+++ b/src/arch/arm/romstage.ld
@@ -38,19 +38,19 @@ SECTIONS
    . = CONFIG_ROMSTAGE_BASE;

.romtext . : {
-		_rom = .;
    	_start = .;
    	*(.text.stage_entry.arm);
    	*(.text.startup);
    	*(.text);
+		*(.text.*);
    } : to_load

.romdata . : {
    	*(.rodata);
-		*(.machine_param);
+		*(.rodata.*);
    	*(.data);
+		*(.data.*);
    	. = ALIGN(8);
-		_erom = .;
    }

/* bss does not contain data, it is just a space that should be zero
@@ -61,12 +61,12 @@ SECTIONS
    	. = ALIGN(8);
    	_bss = .;
    	*(.bss)
+		*(.bss.*)
    	*(.sbss)
-		*(COMMON)
+		*(.sbss.*)
+		_ebss = .;
    }

-	_ebss = .;
-
    _end = .;

/* Discard the sections we don't need/want */