Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/28789
Change subject: soc/cavium/cn81xx/spi: Add function to return SPI clock ......................................................................
soc/cavium/cn81xx/spi: Add function to return SPI clock
Change-Id: I07c95b9ea14d47da0497470487fa3f162f8012c8 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/cavium/cn81xx/include/soc/spi.h M src/soc/cavium/cn81xx/spi.c 2 files changed, 22 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/28789/1
diff --git a/src/soc/cavium/cn81xx/include/soc/spi.h b/src/soc/cavium/cn81xx/include/soc/spi.h index bb69daa..33f0f29 100644 --- a/src/soc/cavium/cn81xx/include/soc/spi.h +++ b/src/soc/cavium/cn81xx/include/soc/spi.h @@ -29,6 +29,7 @@ const size_t speed_hz, const size_t idle_low, const size_t idle_cycles); +uint64_t spi_get_clock(const size_t bus); void spi_set_lsbmsb(const size_t bus, const size_t lsb_first); void spi_init_custom(const size_t bus, const size_t speed_hz, diff --git a/src/soc/cavium/cn81xx/spi.c b/src/soc/cavium/cn81xx/spi.c index 5a5865e..6527f22 100644 --- a/src/soc/cavium/cn81xx/spi.c +++ b/src/soc/cavium/cn81xx/spi.c @@ -218,6 +218,27 @@ }
/** + * Get current SPI clock frequency in Hz. + * + * @param bus The SPI bus to operate on + */ +uint64_t spi_get_clock(const size_t bus) +{ + union cavium_spi_cfg cfg; + + assert(bus < ARRAY_SIZE(cavium_spi_slaves)); + if (bus >= ARRAY_SIZE(cavium_spi_slaves)) + return 0; + + struct cavium_spi *regs = cavium_spi_slaves[bus].regs; + const uint64_t sclk = thunderx_get_io_clock(); + + cfg.u = read64(®s->cfg); + + return (sclk / (2ULL * cfg.s.clkdiv)); +} + +/** * Set SPI LSB/MSB first. * * @param bus The SPI bus to operate on